Programmable refresh scheduler for embedded DRAMs
AssigneeBroadcom Corporation
InventorsGil I. Winograd, Sami Issa, Morteza Cyrus Afghahi
Life of this patent
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Abstract
In one aspect, the invention describes a mechanism for refreshing multiple memory words (rows) per refresh cycle, the number of simultaneously refreshed rows being programmable by a small number of inputs. In another aspect, the invention discloses a mechanism for refreshing all banks or a programmable number of banks simultaneously in a multi-bank memory. In yet another aspect, the present invention describes a mechanism for refreshing a programmable multiple memory rows and a programmable multiple banks simultaneously.
Claims25
A DRAM programmable for simultaneous refreshing of a plurality of memory words comprising:
- a plurality of memory banks each memory bank including a plurality of memory blocks and each memory block including a plurality of memory words;
- a plurality of bank decoders for selecting a respective memory bank;
- a plurality of word decoders for selecting a respective memory word in a memory block;
- a plurality of local sense amplifiers for amplifying data for a plurality of local bit lines respectively;
- and a programmable register for selecting a programmable plurality of memory words for simultaneous refreshing.
A method for simultaneously refreshing a plurality of DRAM words, the method comprising the steps of:
- arranging the DRAM with a plurality of memory banks, each memory bank including a plurality of memory blocks, wherein each memory bank is selectable by a bank decoder;
- arranging each memory block with a plurality of memory words, wherein each memory word is selectable by a word decoder;
- and
- programming a register for selecting a programmable plurality of memory words to be refreshed simultaneously.
A DRAM comprising:
- a plurality of memory banks each memory bank including a plurality of memory blocks and each memory block including a plurality of memory words;
- means for selecting a respective memory bank;
- means for selecting a respective memory word in a memory block;
- and
- means for selecting a programmable plurality of memory words to be refreshed simultaneously.
Dependencies are inferred from the claim text.