US 6,633,895 B1 · Apparatus and method for sharing overflow/underflow compare hardware in a floating-point multiply-accumulate (FMAC) or floating-point adder (FADD) unit

Abstract

An apparatus and method provide for performing either an overflow or underflow comparison while minimizing overflow/underflow comparison circuitry. In particular, the apparatus and are implemented with overflow/underflow possible check circuitry that determines if a mathematical operation between a first exponent signal and a second exponent signal creates a potential overflow condition. The overflow/underflow possible check circuitry generates a signal indicating whether an overflow or underflow condition is a possibility. Exponent compare circuitry computes an actual overflow or underflow condition. The exponent compare circuitry computes an actual overflow condition if the signal, from the overflow/underflow possible check circuitry, indicates that overflow is possible, and computes an actual underflow condition if the signal, from the overflow/underflow possible check circuitry, does not indicate overflow is possible.

Claims9

Dependent claims

An exponent compare apparatus for computing overflow and underflow conditions, the apparatus comprising:

a plurality of constant selectors, wherein each of said plurality of constant selectors selects an exponent precision underflow/overflow constant from a plurality of exponent underflow/overflow constants;
a plurality of carry save adders, wherein each of said plurality of carry save adders generates a sum signal and carry signal from one of said plurality of exponent precision underflow/overflow constants, a pre-normalized exponent signal and a normalization shift amount signal;
a plurality of comparators, wherein each of said comparators is configured to compute an underflow/overflow result from said sum signal and said carry signal;
and
a plurality of underflow/overflow result selectors, wherein each of said underflow/overflow result selector is configured to transmit an underflow/overflow condition based upon said underflow/overflow result, from said plurality of comparators, and an exponent adjust amount signal.

2 more elements

Dependencies are inferred from the claim text.

Apparatus and method for sharing overflow/underflow compare hardware in a floating-point multiply-accumulate (FMAC) or floating-point adder (FADD) unit

Life of this patent

Apparatus and method for sharing overflow/underflow compare hardware in a floating-point multiply-accumulate (FMAC) or floating-point adder (FADD) unit

Life of this patent

Abstract

Claims9