Flat display device

A flat panel display comprising:

• a display panel having an array substrate including a matrix of data lines and scan lines arranged on an insulating substrate, pixel switch elements arranged at intersections of the data and scan lines, and pixel electrodes connected to the pixel switch elements, a counter electrode facing the pixel electrodes, and a light modulation layer interposed between the pixel electrode and the counter electrode;
• a data-line driver for providing the data lines with corresponding analog video signals;
• and
• a scan-line driver for providing the scan lines with scan signals, the data-line driver including:
• video bus lines arranged on the insulating substrate;
• a switch circuit for electrically connecting video bus lines to corresponding ones of the data lines;
• and
• at least first, second, and third digital-to-analog converters for sequentially converting digital video signals to analog signals, each of the first, second, and third digital-to-analog converters connected to plural of data lines respectively, and giving analog video signals to correspond data lines in accordance with the analog signals,
• the data line electrically connected to the first digital-to-analog converter, the data line electrically connected to the second digital-to-analog converter, and the data line electrically connected to the third digital-to-analog converter being alternately arranged at intervals of a given number.

A flat panel display comprising:

• a display panel having an array substrate including a matrix of data lines and scan lines arranged on an insulating substrate, pixel switch elements arranged at intersections of the data and scan lines, and pixel electrodes connected to the pixel switch elements, a counter electrode facing the pixel electrodes, and a light modulation layer interposed between the pixel electrode and the counter electrode;
• a data-line driver for providing the data lines with corresponding analog video signals;
• and
• a scan-line driver for providing the scan lines with scan signals,
• the data-line driver including:
• video bus lines arranged on the insulating substrate;
• a switch circuit for electrically connecting video bus lines to corresponding ones of the data lines;
• and
• at least first, second, third, and fourth digital-to-analog converters for sequentially converting digital video signals to analog signals, each of the first, second, third, and fourth digital-to-analog converters connected to plural of data lines respectively, and giving analog video signals to correspond data lines in accordance with the analog signals,
• the data line electrically connected to the first digital-to -analog converter, the data line electrically connected to the second digital-to-analog converter, the data line electrically connected to the third digital-to-analog converter, and the data line electrically connected to the fourth digital-to-analog converter being alternately arranged at intervals of a given number.

A flat panel display comprising:

• a display panel having an array substrate including a matrix of data lines and scan lines arranged on an insulating substrate, pixel switch elements arranged at intersections of the data and scan lines, and pixel electrodes connected to the pixel switch elements, a counter electrode facing the pixel electrodes, and a light modulation layer interposed between the pixel electrodes and the counter electrode;
• a data-line driver for providing the data lines with corresponding analog video signals;
• and
• a scan-line driver for providing the scan lines with scan signals,
• the data-line driver including:
• video bus lines arranged on the insulating substrate;
• at least first and second digital-to-analog converters electrically connected to the video bus lines, for sequentially converting digital video signals into analog signals, each of the first and second digital-to-analog converters connected to plural of data lines respectively, and giving analog video signals to correspond data lines in accordance with the analog signals;
• and
• at least first and second shift registers for sequentially carrying out serial-to-parallel conversion on the analog video signals for the data lines and connecting them to data line groups that have been formed by dividing the data lines in a data line extending direction,
• the data lines electrically connected to the first digital-to-analog converter and the data lines electrically connected to the second digital-to-analog converter being alternately arranged at intervals of a given number,
• the data line connected to a first stage of the first shift register and the data line connected to a first stage of the second shift register, or the data sine connected to a last stage of the first shift register and the data line connected to a last stage of the second shift register being arranged adjacent to each other.