Level shift circuit and semiconductor device using the same

A semiconductor device incorporating at least one level shift circuit, the level shift circuit comprising:

• first and second circuits connected in parallel between a first supply line supplying a first potential and a second supply line supplying a second potential lower in an absolute value than the first potential,
• wherein each of the first and second circuits includes first and second transistors of a first conductivity type, and a second conductivity type transistor connected in series between the first and second supply lines in order from a first-supply-line side,
• wherein a gate of the first transistor of the first conductivity type in the first circuit is connected to a drain of the second conductivity type transistor in the second circuit,
• wherein a gate of the first transistor of the first conductivity type in the second circuit is connected to a drain of the second conductivity type transistor in the first circuit,
• wherein input potentials opposite to each other are applied to gates of the second conductivity type transistors in the first and second circuits respectively, and output potentials level-shifted from the input potentials sire output from drains of the second conductivity type transistors in the first and second circuits respectively, and
• wherein a third supply line supplying a third potential via a resistor between the first and second potentials is connected to a gate of the second transistor of the first conductivity type in each of the first and second circuits.

A level shift circuit comprising first and second circuits connected in parallel between a first supply line supplying a first potential and a second supply line supplying a second potential lower in an absolute value than the first potential,

• wherein each of the first and second circuits includes first and second transistors of a first conductivity type and a second conductivity type transistor connected in series between the first and second supply lines in order from a first-supply-line side,
• wherein a gate of the first transistor of the first conductivity type in the first circuit is connected to a drain of the second conductivity type transistor in the second circuit,
• wherein a gate of the first transistor of the first conductivity type in the second circuit is connected to a drain of the second conductivity type transistor in the first circuit,
• wherein input potentials opposite to each other are applied to gates of the second conductivity type transistors in the first and second circuits respectively, and output potentials level-shifted from the input potentials are output from drains of the second conductivity type transistors in the first and second circuits respectively, and
• wherein the second transistor of the first conductivity type in each of the first and second circuits is depletion type, and a gate of the second transistor of the first conductivity type in each of the first and second circuits is connected to the first supply line.

A semiconductor device incorporating at least one level shift circuit comprising first and second circuits connected in parallel between a first supply line supplying a first potential and a second supply line supplying a second potential lower in an absolute value than the first potential,

• wherein each of the first and second circuits includes first and second transistors of a first conductivity type and a second conductivity type transistor connected in series between the first and second supply lines in order from a first-supply-line side,
• wherein a gate of the first transistor of the first conductivity type in the first circuit is connected to a drain of the second conductivity type transistor in the second circuit,
• wherein a gate of the first transistor of the first conductivity type in the second circuit is connected to a drain of the second conductivity type transistor in the first circuit,
• wherein input potentials opposite to each other are applied to gates of the second conductivity type transistors in the first and second circuits respectively, and output potentials level-shifted from the input potentials are output from drains of the second conductivity type transistors in the first and second circuits respectively, and
• wherein the second transistor of the first conductivity type in each of the first and second circuits is depletion type, and a gate of the second transistor of the first conductivity type in each of the first and second circuits is connected to the first supply line.