Phase comparator and synchronizing signal extracting device
AssigneeYazaki Corporation
InventorsGijun Idei, Kazuyoshi Unno
Life of this patent
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AssigneeYazaki Corporation
InventorsGijun Idei, Kazuyoshi Unno
Estimating the term…
While generating a correction pulse (E) based on a clock signal (Xck1) input into one input terminal (6), a frequency and a phase of a differentiated pulse train (Data_Dif) input into the other input terminal (5) are compared with a frequency and a phase of the clock signal input into the one input terminal, then a leading phase instructing pulse (U4) and an incomplete lagging phase instructing pulse (D4a) are generated based on this compared result, then false pulses contained in the incomplete lagging phase instructing pulse (d4a) are removed by using the correction pulse (E) when the differentiated pulse train (Data_Dif) input into the other input terminal is in the tooth missing state, and then the precise leading phase instructing pulse (U4) and the precise lagging phase instructing pulse (D4) are output from two output terminals (7, 8).
A phase comparator comprising:
A phase comparator comprising:
A synchronizing signal extracting device comprising:
A synchronizing signal extracting device comprising:
Dependencies are inferred from the claim text.