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US 6,633,070 B2Granted
Semiconductor device
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsNaruhisa Miura, Toshiyuki Oishi, Yuji Abe, Kohei Sugihara
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Abstract
A field-effect transistor including a gate electrode, silicon layers, and source and drain regions at a surface of a silicon substrate. Sidewall insulating films on the opposite side surfaces of the gate electrode are located between the gate electrode and the silicon layers and contain respective voids.
Claims10
A semiconductor device comprising:
- a gate electrode on a surface of a semiconductor substrate with a gate insulating film between said gate electrode and said semiconductor substrate, said gate electrode having a wider portion and a narrower portion and including an upper layer of silicon and a lower layer of silicon-germanium, said upper layer including said wider portion and said lower layer including said narrower portion;
- sidewall insulating films located on and in contact with opposite side surfaces of said gate electrode;
- and
- source and drain regions in first and second regions of said semiconductor substrate, spaced from each other, with said gate electrode and said sidewall insulating films between said source and drain regions, each of said source and drain regions including a portion at the surface of said semiconductor substrate and a raised portion on a surface of said portion at the surface of said semiconductor substrate, wherein said wider portion of said gate electrode is located closer to said raised portion than said narrower portion of said gate electrode, and said sidewall insulating films are located between and have respective thicknesses between said raised portions and said gate electrode, and include respective voids, lowering capacitance between said gate electrode and said raised portions.
1 more element
A semiconductor device comprising:
- a gate electrode on a surface of a semiconductor substrate with a gate insulating film between said gate electrode and said semiconductor substrate;
- sidewall insulating films located on and in contact with opposite side surfaces of said gate electrode;
- and
- source and drain regions in first and second regions of said semiconductor substrate, spaced from each other, with said gate electrode and said sidewall insulating films between said source and drain regions, each of said source and drain regions including a portion at the surface of said semiconductor substrate and a raised portion on a surface of said portion at the surface of said semiconductor substrate, wherein said sidewall insulating films are located between and have respective thicknesses between said raised portions and said gate electrode, and include respective voids, lowering capacitance between said gate electrode and said raised portions, said gate electrode extends further from the surface of said semiconductor substrate than said raised portions, and the voids are disposed in portions of said sidewall insulating films no further from the surface of said semiconductor substrate than said raised portions.
1 more element
Dependencies are inferred from the claim text.