Non-volatile semiconductor memory and fabricating method therefor

A non-volatile semiconductor memory, comprising:

• a peripheral circuit zone having a gate electrode for a peripheral transistor therein;
• a memory zone having plural memory cell transistors therein that are arranged in a line, each of said plural memory cell transistors having a floating gate and a control gate;
• a word line that extends in a line over said line of plural memory cell transistors and that is said control gate for said plural memory cell transistors;
• an interlayer insulator over said word line and over said gate electrode, said interlayer insulator having a linearly extended groove therein that is aligned with said word line and that reaches said word line throughout a length thereof that is over said line of plural memory cell transistors, said interlayer insulator having a contact hole therein that extends to said gate electrode;
• a first conducting material to form a plate-shaped contact in said groove that contacts said word line throughout the length thereof that is over said line of plural memory cells;
• and
• a second conducting material in said contact hole that contacts said gate electrode.