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US 6,632,734 B2Granted
Parallel plane substrate
AssigneeIntel Corporation
InventorRobert L. Sankman
Life of this patent
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Abstract
A microelectronic substrate having a plurality of alternating substantially planar layers of dielectric material and conductive material, and further having a first surface and a second surface, wherein the dielectric material and the conductive material layers extend substantially perpendicularly between the first and second surfaces.
Claims9
A method of fabricating a microelectronic substrate, comprising:
- layering alternating substantially planer dielectric material layers and conductive material layers to form a block, wherein layering said conductive layers comprised layering at least one intermittent conductive material layer;
- slicing a section from said block perpendicular to said planar dielectric material layers and said conductive material layers.
A method of fabricating a microelectronic device, comprising:
- layering alternating substantially planar dielectric material layers and conductive material layers to form a block, wherein layering said conductive layers comprises layering at least one intermittent conductive material layer;
- slicing a section from said block perpendicular to said planar dielectric material layers and said conductive material layers to provide a substrate having a first surface and a second surface;
- and
- disposing a trace network on at least one of said substrate first surface and said substrate second surface.
1 more element
Dependencies are inferred from the claim text.