Laser thermal annealing of high-k gate oxide layers
AssigneeAdvanced Micro Devices, Inc.
InventorEric N. Paton
Life of this patent
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Abstract
A method of manufacturing a semiconductor device, comprising the steps of: (a) providing a semiconductor substrate having a surface; (b) forming a gate oxide layer on at least a portion of the surface and including an interface therewith, the gate oxide layer comprising a high-k dielectric oxide including a plurality of interface traps at the interface; (c) forming a gate electrode layer on at least a portion of the gate oxide layer; and (d) laser thermal annealing the high-k gate oxide layer to de-activate the interface traps without incurring formation of a low-k dielectric oxide layer at the interface.
Claims15
A method of manufacturing a semiconductor device, comprising the steps of:
- (a) providing a semiconductor substrate having a surface;
- (b) forming a gate oxide layer on at least a portion of said surface of said semiconductor substrate and including an interface therewith, said gate oxide layer comprising a high-k dielectric oxide including a plurality of interface traps at said interface;
- (c) forming a gate electrode layer on at least a portion of said gate oxide layer;
- and
- (d) laser thermal annealing (LTA) said high-k dielectric gate oxide layer to de-activate said interface traps without incurring formation of a low-k dielectric oxide layer at said interface.
Dependencies are inferred from the claim text.