Manufacturing method of active matrix substrate plate and manufacturing method therefor

A method for manufacturing an active matrix substrate plate formed on a transparent insulating substrate plate having an array of pixel regions, wherein each pixel region contains a scanning line and a signal line and is surrounded by the scanning line and the signal line crossing each other at right angles, and in each pixel region is formed an inverted staggered structure thin film transistor comprised by a gate electrode, an island-shaped semiconductor layer opposing the gate electrode across a gate insulation layer, a pair of drain electrode and source electrode separated by a channel gap formed above the semiconductor layer, such that a pixel electrode is formed in a window section surrounded by the scanning line and the signal line for transmitting light, and the gate electrode is connected to the scanning line, the drain electrode is connected to the signal line, and the source electrode is connected to the pixel electrode, said method comprising:

• in a first photolithographic step, forming a conductor layer on the transparent insulation substrate plate, and excepting the scanning line, a scanning line terminal section formed in a scanning line start end, and in each pixel region, the gate electrode extending from the scanning line to the thin film transistor section or sharing a portion of the scanning line, removing the conductor layer by etching;
• in a second photolithographic step, laminating successively on the transparent insulation substrate plate, a gate insulation layer and a semiconductor layer comprised by an amorphous silicon layer, and forming an n+ amorphous silicon layer on the semiconductor layer by doping with a group V element, and then depositing a metallic layer, and excepting the signal line or a portion covering the signal line, a signal line terminal section formed on a signal line start end section, and in each pixel region, a protrusion section extending from the signal line to the pixel electrode through the thin film transistor section, removing the metallic layer and the semiconductor layer by etching;
• in a third photolithographic step, forming a transparent conductive layer on the transparent insulation substrate plate, and excepting the signal line or the portion covering the signal line, the signal line terminal section formed in the signal line start end section, and in each pixel region, the drain electrode extending from the signal line to the thin film transistor section, the pixel electrode, and the source electrode disposed opposite to the drain electrode across a channel gap, removing the transparent conductive layer by etching, and then removing by etching portions of the metallic layer and the n+ amorphous silicon layer formed by doping with a group V element where exposed;
• and
• in a fourth photolithographic step, forming a protective insulation layer on the transparent insulation substrate plate, and removing the protective insulation layer above the pixel electrode and the signal line terminal section, and the protective insulation layer and the gate insulation layer above the scanning line terminal section by etching, to expose the pixel electrode comprised by the transparent conductive layer, the signal line terminal comprised by a lamination of the metallic layer and the transparent conductive layer or the transparent conductive layer itself, and the scanning line terminal comprised by the conductor layer.

A method for manufacturing an active matrix substrate plate formed on a transparent insulating substrate plate by a plurality of scanning lines alternating with a plurality of common wiring lines, and a pixel region, containing a scanning line and a signal line is surrounded by the scanning line and the signal line crossing at right angles to each other, is arrayed in such a way that in each pixel region is formed an inverted staggered structure thin film transistor comprised by a gate electrode, an island-shaped semiconductor layer opposing the gate electrode across a gate insulation layer, a pair of drain electrode and source electrode separated by a channel gap formed above the semiconductor layer, such that in a window section surrounded by the scanning line and the signal line are formed a pixel electrode of a comb teeth shape and a common electrode of a comb teeth shape connecting to a common wiring line and opposing the pixel electrode, so that the gate electrode is connected to the scanning line, the drain electrode is connected to the signal line, and the source electrode is connected to the pixel electrode, so as to generate a horizontal electrical field with respect to the transparent insulating substrate plate between the pixel electrode and the common electrode, said method comprising:

• in a first photolithographic step, forming a conductor layer on the transparent insulation substrate plate, and excepting the scanning line, a scanning line terminal section formed in a scanning line start end, and, a common wiring line whose end section at least in one perimeter section of the transparent insulation substrate plate extends outside of an end section of the scanning line in the same perimeter section, a common wiring line linking line for electrically connecting end sections of the common wiring lines, and in each pixel region, the gate electrode sharing a portion of the scanning line, and a plurality of common electrodes extending from the common wiring line, removing the conductor layer by etching;
• in a second photolithographic step, laminating successively on the transparent insulation substrate plate, a gate insulation layer and a semiconductor layer comprised by an amorphous silicon layer and an n+ amorphous silicon layer, and a metallic layer, and excepting the signal line or the portion covering the signal line, a signal line terminal section formed in the signal line start end section, and in each pixel region, a protrusion section extending from the signal line to the pixel electrode section through the thin film transistor section, removing the metallic layer and the semiconductor layer by etching;
• in a third photolithographic step, laminating on the transparent insulation substrate plate a transparent conductive layer or a nitride film layer of a metal or a second metallic layer, and excepting the signal line or the portion covering the signal line, the signal line terminal section formed in the signal line start end section, and in each pixel region, the drain electrode extending from the signal line to the thin film transistor section above the gate electrode, the pixel electrode opposing the common electrode across the gate insulation layer, and the source electrode extending from the pixel electrode to the thin film transistor section disposed opposite to the drain electrode across a channel gap, removing the transparent conductive layer or the nitride film layer of a metal or the second metallic layer by etching, and then removing by etching portions of the metallic layer and the n+ amorphous silicon layer where exposed;
• and
• in a fourth photolithographic step, forming a protective insulation layer on the transparent insulation substrate plate, and removing the protective insulation layer above the signal line terminal section and the protective insulation layer and the gate insulation layer above the scanning line terminal section by etching, to expose the signal line terminal comprised by any one of a lamination of the metallic layer and the transparent conductive layer or a nitride film layer of a metal, or the transparent conductive layer, or a nitride film layer of a metal, or the second metallic layer, and the scanning line terminal comprised by the conductor layer.

A method for manufacturing an active matrix substrate plate formed on a transparent insulating substrate plate by a plurality of scanning lines alternating with a plurality of common wiring lines, and a pixel region, containing a scanning line and a signal line is surrounded by the scanning line and the signal line crossing at right angles to each other, is arrayed in such a way that in each pixel region is formed an inverted staggered structure thin film transistor comprised by a gate electrode, an island-shaped semiconductor layer opposing the gate electrode across a gate insulation layer, a pair of drain electrode and source electrode separated by a channel gap formed above the semiconductor layer, such that in a window section surrounded by the scanning line and the signal line are formed a pixel electrode of a comb teeth shape and a common electrode of a comb teeth shape connecting to a common wiring line and opposing the pixel electrode, so that the gate electrode is connected to the scanning line, the drain electrode is connected to the signal line, and the source electrode is connected to the pixel electrode, so as to generate a horizontal electrical field with respect to the transparent insulating substrate plate between the pixel electrode and the common electrode, said method comprising:

• in a first photolithographic step, forming a conductor layer on the transparent insulation substrate plate, and excepting the scanning line, a scanning line terminal section formed in a scanning line start end, and, a common wiring line whose end section at least in one perimeter section of the transparent insulation substrate plate extends outside of an end section of the scanning line in the same perimeter section, a common wiring line linking line for electrically connecting end sections of the common wiring lines, and in each pixel region, the gate electrode sharing a portion of the scanning line, and a plurality of common electrodes extending from the common wiring line, removing the conductor layer by etching;
• in a second photolithographic step, laminating successively on the transparent insulation substrate plate, a gate insulation layer and a semiconductor layer comprised by an amorphous silicon layer, and forming an n+ amorphous silicon layer on the semiconductor layer by doping with a group V element, and then depositing a metallic layer, and excepting the signal line or a portion covering the signal line, a signal line terminal section formed in a signal line start end section, and in each pixel region, a protrusion section extending from the signal line to the pixel electrode section through the thin film transistor section, removing the metallic layer and the semiconductor layer by etching;
• in a third photolithographic step, laminating on the transparent insulation substrate plate a transparent conductive layer or a nitride film layer of a metal or a second metallic layer, and excepting the signal line or the portion covering the signal line, the signal line terminal section formed in the signal line start end section, and in each pixel region, the drain electrode extending from the signal line to the thin film transistor section above the gate electrode, the pixel electrode opposing the common electrode across the gate insulation layer, and the source electrode extending from the pixel electrode to the thin film transistor section disposed opposite to the drain electrode across a channel gap, removing the transparent conductive layer or the nitride film layer of a metal or the second conductor layer by etching, and then removing by etching the metallic layer and the n+ amorphous silicon layer formed by doping with the group V element where exposed;
• and
• in a fourth photolithographic step, forming a protective insulation layer on the transparent insulation substrate plate, and removing the protective insulation layer above the signal line terminal section, and the protective insulation layer and the gate insulation layer above the scanning line terminal section by etching, to expose the signal line terminal comprised by any one of a lamination of the metallic layer and the transparent conductive layer or a metal nitride film, or the transparent conductive layer, or a metal nitride film layer, or the second metallic layer, and the scanning line terminal comprised by the conductor layer.

A method for manufacturing an active matrix substrate plate formed on a transparent insulating substrate plate by a plurality of scanning lines alternating with a plurality of common wiring lines, and a pixel region, containing a scanning line and a signal line is surrounded by the scanning line and the signal line crossing at right angles to each other, is arrayed in such a way that in each pixel region is formed an inverted staggered structure thin film transistor comprised by a gate electrode, an island-shaped semiconductor layer opposing the gate electrode across a gate insulation layer, a pair of drain electrode and source electrode separated by a channel gap formed above the semiconductor layer, such that in a window section surrounded by the scanning line and the signal line are formed a pixel electrode of a comb teeth shape and a common electrode of a comb teeth shape connecting to a common wiring line and opposing the pixel electrode, so that the gate electrode is connected to the scanning line, the drain electrode is connected to the signal line, and the source electrode is connected to the pixel electrode, so as to generate a horizontal electrical field with respect to the transparent insulating substrate plate between the pixel electrode and the common electrode, said method comprising:

• in a first photolithographic step, forming a conductor layer on the transparent insulation substrate plate, and excepting the scanning line, a scanning line terminal section formed in a scanning line start end, and a common wiring line whose end section at least in one perimeter section of the transparent insulation substrate plate extends outside of an end section of the scanning line in the same perimeter section, a common wiring line linking line for electrically connecting end sections of the common wiring lines, and in each pixel region, the gate electrode sharing a portion of the scanning line, and a plurality of common electrodes extending from the common wiring line, removing the conductor layer by etching;
• in a second photolithographic step, laminating successively on the transparent insulation substrate plate, a gate insulation layer and a semiconductor layer comprised by an amorphous silicon layer and an n+ amorphous silicon layer, and a metallic layer, and excepting the signal line or a portion covering the signal line, a signal line terminal section formed in a signal line start end section, and in each pixel region, a protrusion section extending from the signal line to the pixel electrode section through the thin film transistor section, and the pixel electrode extending from the protrusion section to the common electrode through the gate insulation layer or the portion covering the pixel electrode, removing the metallic layer and the semiconductor layer by etching;
• in a third photolithographic step, laminating on the transparent insulation substrate plate, a transparent conductive layer or a nitride layer of a metal or a second metallic layer, and excepting the signal line or the portion covering the signal line, the signal line terminal section formed in the signal line start end section, and in each pixel region, the drain electrode extending from the signal line to the thin film transistor section above the gate electrode, the pixel electrode or the portion covering the pixel electrode, and the source electrode extending from the pixel electrode to the thin film transistor section disposed opposite to the drain electrode across a channel gap, removing the transparent conductive layer or the nitride film layer of a metal or the second metallic layer by etching, and then removing by etching the metallic layer and the n+ amorphous silicon layer where exposed;
• and
• in a fourth photolithographic step, forming a protective insulation layer on the transparent insulation substrate plate, and removing the protective insulation layer above the signal line terminal section, and the protective insulation layer and the gate insulation layer above the scanning line terminal section by etching, to expose the signal line terminal comprised by any one of a lamination of the metallic layer and the transparent conductive layer or a metal nitride film, or the transparent conductive layer or a metal nitride film layer or the second metallic layer, and the scanning line terminal comprised by the conductor layer.

A method for manufacturing an active matrix substrate plate formed on a transparent insulating substrate plate by a plurality of scanning lines alternating with a plurality of common wiring lines, and a pixel region, containing a scanning line and a signal line is surrounded by the scanning line and the signal line crossing at right angles to each other, is arrayed in such a way that in each pixel region is formed an inverted staggered structure thin film transistor comprised by a gate electrode, an island-shaped semiconductor layer opposing the gate electrode across a gate insulation layer, a pair of drain electrode and source electrode separated by a channel gap formed above the semiconductor layer, such that in a window section surrounded by the scanning line and the signal line are formed a pixel electrode of a comb teeth shape and a common electrode of a comb teeth shape connecting to a common wiring line and opposing the pixel electrode, so that the gate electrode is connected to the scanning line, the drain electrode is connected to the signal line, and the source electrode is connected to the pixel electrode, so as to generate a horizontal electrical field with respect to the transparent insulating substrate plate between the pixel electrode and the common electrode, said method comprising:

• in a first photolithographic step, forming a conductor layer on the transparent insulation substrate plate, and excepting the scanning line, a scanning line terminal section formed in a scanning line start end, and a common wiring line whose end section at least in one perimeter section of the transparent insulation substrate plate extends outside of an end section of the scanning line in the same perimeter section, a common wiring line linking line for electrically connecting end sections of the common wiring lines, and in each pixel region, the gate electrode sharing a portion of the scanning line, and a plurality of common electrodes extending from the common wiring line, removing the conductor layer by etching;
• in a second photolithographic step, laminating successively on the transparent insulation substrate plate, a gate insulation layer and a semiconductor layer comprised by an amorphous silicon layer, and forming an n+ amorphous silicon layer on the semiconductor layer by doping with a group V element, and then depositing a metallic layer, and excepting the signal line or the portion covering the signal line, a signal line terminal section formed in a signal line start end section, and in each pixel region, a protrusion section extending from the signal line to the pixel electrode section through the thin film transistor section, and the pixel electrode extending from the protrusion section to the opposing common electrode through the gate insulation layer or a portion covering the pixel electrode, removing the metallic layer and the semiconductor layer by etching;
• in a third photolithographic step, laminating on the transparent insulation substrate plate a transparent conductive layer or a nitride layer of a metal or a second metallic layer, and excepting the signal line or the portion covering the signal line, the signal line terminal section formed in the signal line start end section, and in each pixel region, the drain electrode extending from the signal line to the thin film transistor section above the gate electrode, the pixel electrode or the portion covering the pixel electrode, and the source electrode extending from the pixel electrode to the thin film transistor section disposed opposite to the drain electrode across a channel gap, removing the transparent conductive layer or the nitride film layer of a metal or the second metallic layer by etching, and then removing the metallic layer and the n+ amorphous silicon layer formed by doping of the group V element, where expose, by etching;
• and
• in a fourth photolithographic step, forming a protective insulation layer on the transparent insulation substrate plate, and removing the protective insulation layer above the signal line terminal section and the protective insulation layer and the gate insulation layer above the scanning line terminal section by etching, to expose the signal line terminal comprised by any one of a lamination of the metallic layer and the transparent conductive layer or a metal nitride film, or the transparent conductive layer or a metal nitride film layer or the second metallic layer, and the scanning line terminal comprised by the conductor layer.