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US 6,632,372 B1Granted
Method of forming via-holes in multilayer circuit boards
AssigneeIndustrial Technology Research Institute
InventorsMan-Lin Chen, Hsien-Kuang Lin, Chuang-Shin Chiou, Tien-Shou Shieh, Pey-Ching Liou
Life of this patent
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Abstract
The invention discloses a method of forming via-holes in multilayer circuit boards. The process includes forming covering substances in predetermined spots in a multilayer circuit board and thereafter applying an insulating layer upon the circuit board. The predetermined spots are then uncovered and the covering substances are removed to form via-holes.
Claims20
A method of forming via-holes in a multi-layer circuit board comprising:
- forming a covering substance at predetermined spots on the multiplayer circuit board;
- applying an insulating layer onto the multi-layer circuit board, and over the covering substance, and thereafter uncovering the covering substance;
- and removing said covering substance to obtain via-holes.
Dependencies are inferred from the claim text.