Back to results
US 6,627,950 B1Granted
Trench DMOS power transistor with field-shaping body profile and three-dimensional geometry
AssigneeSiliconix Incorporated
InventorsConstantin Bulucea, Rebecca Rossen
Life of this patent
Estimating the term…
Abstract
Power MOSFET apparatus, and method for its production, that suppresses voltage breakdown near the gate, using a polygon-shaped trench in which the gate is positioned, using a shaped deep body junction that partly lies below the trench bottom, and using special procedures for growth of gate oxide at various trench corners.
Claims92
A trench DMOS transistor cell comprising:
- a substrate of a first conductivity type, said substrate having a surface;
- an epitaxial layer of said first conductivity type formed on said surface of said substrate, said epitaxial layer having a top surface and a bottom surface, said epitaxial layer having a substantially uniform initial dopant concentration at formation;
- a body region of a second conductivity type opposite to said first conductivity type formed in said epitaxial layer, said body region extending, as measured from said top surface of said epitaxial layer, to a first depth dmax at a first location and to a depth of d at a second location, where d is less than dmax, said first and second locations being separated by a predetermined horizontal distance;
- a source region of said first conductivity type formed in said expitaxial layer above a portion of said body region, said portion of said body region being located between said second location and said source region;
- and
- a trench formed in said epitaxial layer, having substantially vertical side walls, and extending from said top surface of said epitaxial layer to a depth dtr less than said depth dmax and greater than said depth d, said trench being (i) closer to said second location than to said first location and (ii) horizontally adjacent said source region;
- wherein breakdown in said trench DMOS transistor cell occurs across said epitaxial layer at a position closer to said first location than to said second location.
4 more elements
A trench DMOS transistor cell comprising:
- a substrate of semiconductor material of a first electrical conductivity type having a top surface;
- a first covering layer of semiconductor material of said first electrical conductivity type, said first covering layer (i) having a dopant concentration less than that of said substrate, (ii) having a top surface and (iii) being contiguous to and overlying the top surface of the substrate;
- a second covering layer of semiconductor material of a second electrical conductivity type opposite to said first electrical conductivity type having a top surface and being contiguous to the top surface of the first covering layer and extending vertically downward from the top surface of the first covering layer into an upper portion of the first covering layer;
- a third covering layer of semiconductor material of said first electrical conductivity type having a top surface and being contiguous to and partly overlying the top surface of the second covering layer where the maximum depth of the second covering layer relative to the top surface of the third covering layer is a depth d1;
- a trench, having side walls and a bottom wall, said side walls extending vertically downward from the top surface of the third covering layer through the third and second covering layers and through a portion of, but not all of, the first covering layer, where the trench has a maximum depth relative to the top surface of the third covering layer equal to a second depth d2 less than d1;
- a layer of oxide positioned within the trench and contiguous to the bottom walls and side walls of the trench so that portions of the trench are filled with the oxide layer;
- electrically conducting semiconductor material contiguous to the oxide layer and positioned within the trench so that the oxide layer lies between the electrically conducting semiconductor material and the bottom and side walls of the trench;
- and
- three electrodes electrically coupled to the electrically conducting semiconductor material in the trench, to the third covering layer and to the substrate, respectively;
- wherein junction breakdown occurs away from the trench and into a portion of the second covering layer.
7 more elements
A trench DMOS transistor cell comprising:
- a substrate;
- an epitaxial layer above the substrate;
- a trench in the epitaxial layer, the trench having substantially vertical side walls and having a predetermined depth dtr;
- and
- a body region in the epitaxial layer, the body region having a predetermined maximum depth dmax;
- wherein the depth dtr is less than the depth dmax, and wherein junction breakdown occurs away from the trench and into the epitaxial layer.
3 more elements
A transistor comprising:
- a first region of a first conductivity type;
- a second region of a second conductivity type opposite to the first conductivity type overlaying said first region;
- a third region of said first conductivity type such that said first and third regions are separated by said second region;
- a trench having substantially vertical side walls and extending through said third and second regions;
- and
- a gate in said trench;
- wherein a portion P of said second region, which portion P is spaced from said trench, extends deeper than said trench so that, if a predetermined voltage is applied to said gate and to said third region and another predetermined voltage is applied to said first region, an avalanche breakdown occurs away from a surface of said trench.
4 more elements
A transistor comprising:
- a first region of a first conductivity type;
- a second region of said first conductivity type over said first region, said second region being more lightly doped than said first region;
- a third region of a second conductivity type opposite to the first conductivity type overlying said second region, said second and third regions forming a junction;
- a fourth region of said first conductivity type over said third region;
- a trench having substantially vertical side walls and extending through said fourth and third regions;
- and
- a gate in said trench;
- wherein a deepest part of said third region is laterally spaced from said trench;
- and wherein a distance between said deepest part of said third region and said first region is less than a depletion width of a planar junction which has the same doping profile as does said junction between said second and third regions at said deepest part of said third region and which is reverse biased around its breakdown voltage.
6 more elements
A semiconductor device comprising a semiconductor structure having a trench therein of depth dtr and substantially vertical side walls, said semiconductor structure including a drain region, a source region, a body region, and a gate region within said trench and separated from said body region by a dielectric material, said body region having a maximum depth of dmax greater than said depth dtr, wherein junction breakdown occurs away from said trench.
A vertical transistor structure comprising:
- a semiconductor body comprising
- (a) a drain of a first conductivity type,
- (b) a body region of a second conductivity type opposite to the first conductivity type situated largely above the drain and comprising (b1) upper body material laterally surrounded by a trench that extends into the semiconductor body along its upper surface and (b2) lower body material continuous with the upper body material and extending deeper below the semiconductor body's upper surface than the trench, the drain and body region meeting each other to form a drain-body pn junction that extends to the trench, and
- (c) a source of the first conductivity type situated largely above the drain, separated from the drain by the body region, and laterally surrounded by the trench, the drain, body region, and source being of dimensions and dopants distributions suitable for causing semiconductor breakdown of the drain-body pn junction to occur away from the trench;
- a gate dielectric layer comprising gate dielectric material situated in the trench along the body region;
- and
- a gate electrode comprising gate electrode material situated in the trench and separated from the body region by the gate dielectric material.
4 more elements
A vertical transistor structure comprising:
- a semiconductor body comprising
- (a) a drain of a first conductivity type,
- (b) a body region of a second conductivity type opposite to the first conductivity type situated largely above the drain and comprising (b1) upper body material situated between a pair of trenches that extend into the semiconductor body along its upper surface and (b2) lower body material continuous with the upper body material and extending deeper below the semiconductor body's tipper surface than the trenches, the drain and body region meeting each other to form a drain-body pn junction that extends to the trenches, and
- (c) a source of the first conductivity type situated between the trenches largely above the drain and separated from the drain by the body region, the drain, body region, and source being dimensions and dopant distributions suitable for causing semiconductor breakdown of the drain-body pn junction to occur away from the trenches;
- a gate dielectric layer comprising gate dielectric material situated in the trenches along the body region;
- and
- a gate electrode comprising gate electrode material situated in the trenches and separated front the body region by the gate dielectric material.
4 more elements
Dependencies are inferred from the claim text.