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US 6,625,685 B1Granted
Memory controller with programmable configuration
AssigneeBroadcom Corporation
InventorsJames Y. Cho, James B. Keller, Mark D. Hayter
Life of this patent
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AssigneeBroadcom Corporation
InventorsJames Y. Cho, James B. Keller, Mark D. Hayter
Estimating the term…
A memory controller provides programmable flexibility, via one or more configuration registers, for the configuration of the memory. The memory may be optimized for a given application by programming the configuration registers. For example, in one embodiment, the portion of the address of a memory transaction used to select a storage location for access in response to the memory transaction may be programmable. In an implementation designed for DRAM, a first portion may be programmably selected to form the row address and a second portion may be programmable selected to form the column address. Additional embodiments may further include programmable selection of the portion of the address used to select a bank. Still further, interleave modes among memory sections assigned to different chip selects and among two or more channels to memory may be programmable, in some implementations. Furthermore, the portion of the address used to select between interleaved memory sections or interleaved channels may be programmable. One particular implementation may include all of the above programmable features, which may provide a high degree of flexibility in optimizing the memory system.
A memory controller for coupling to a memory arranged into rows and columns of storage locations and for coupling to receive an address of a memory transaction, the memory controller comprising:
A system comprising:
A method comprising:
A carrier medium comprising a database which is operated upon by a program executable on a computer system, the program operating on the database to perform a portion of a process to fabricate an integrated circuit including circuitry described by the database, the circuitry described in the database including a memory controller for coupling to a memory arranged into rows and columns of storage locations and for coupling to receive an address of a memory transaction, the memory controller comprising:
Dependencies are inferred from the claim text.