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US 6,624,524 B1Granted
Laser alignment target
AssigneeAltera Corporation
InventorRaminda U. Madurawe
Life of this patent
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Abstract
A technique to form a structure with a rough topography (415) in a planarized semiconductor process. The rough topography (415) is formed by creating cored contacts (433). Subsequent process layers may be further stacked on top of the cored contacts in order to augment nonplanar characteristics of the cored contacts. This rough topography structure may be used to align integrated circuits and wafers. An integrated circuit may be laser aligned using this alignment structure.
Claims20
An alignment structure formed in a planarized semiconductor process comprising:
- a substrate;
- a first topographical region on the substrate;
- and
- a second topographical region on the substrate adjacent to the first topographical region, the second topographical region having a different optical reflectiveness than the first topographical region, the second topographical region comprising:
- a contact opening formed on the substrate;
- and
- a first plug layer filling the contact opening, the first plug layer having a first depressed region in the contact opening, whereby a topographical roughness formed by the first depressed region scatters incident radiation.
4 more elements
An alignment structure comprising:
- a smooth region formed on a substrate, the smooth region characterized by a first optical reflectiveness value;
- and
- a rough region formed on the substrate, the rough region characterized by a second optical reflectiveness value different from the first optical reflectiveness value, the rough region comprising:
- a first conductive layer;
- a second conductive layer formed above the first conductive layer,
- an first insulating layer, between the first and second conductive layers, wherein the first insulating layer has a first opening for electrically coupling the first and second conductive layers;
- and
- a plug layer filling the first opening, wherein the first plug layer has a cored region, whereby a topographical roughness formed by the cored region scatters incident radiation.
5 more elements
An integrated circuit comprising:
- an alignment structure formed using a planarized process, the alignment structure comprising:
- a substrate;
- a first region formed on the substrate, the first region characterized by a first optical reflectiveness value;
- and
- a second region formed on the substrate adjacent to the first region, the second region characterized by a second optical reflectiveness value different from the first optical reflectiveness value;
- wherein the alignment structure is used to align the integrated circuit.
3 more elements
Dependencies are inferred from the claim text.