Three dimensional processor using transferred thin film circuits
AssigneeKopin Corporation
InventorsPaul M. Zavracky, Matthew Zavracky, Duy-Phach Vu, Brenda Dingle
Life of this patent
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Abstract
A multi-layered structure is fabricated in which a microprocessor is configured in different layers and interconnected vertically through insulating layers which separate each circuit layer of the structure. Each circuit layer can be fabricated in a separate wafer or thin film material and then transferred onto the layered structure and interconnected.
Claims37
A method of fabricating a circuit, comprising:
- forming a first processing circuit in a first layer of semiconductor material;
- forming a second circuit having an array of diodes in a second layer of semiconductor material;
- bonding the second layer to the first layer with a bonding layer;
- forming a plurality of vias through the bonding layer, each via defining an interconnect path between the first circuit and the second circuit;
- and
- depositing a conductor into the vias to interconnect the first circuit with the second circuit along the interconnection paths.
A method of fabricating a processing circuit, comprising:
- forming a second circuit including a diode array within a second layer of a semiconductor material;
- bonding the second circuit to the first circuit with a bonding layer;
- forming a plurality of vias through the bonding layer, each via defining an interconnect path between the first circuit and the second circuit;
- and
- depositing a conductor into the vias to interconnect the first circuit with the second circuit along the interconnection paths.
A method of fabricating a microprocessor, comprising:
- forming a first circuit layer having a microprocessor in a silicon material;
- forming a second circuit layer including an array of diode elements;
- bonding the second circuit layer to the first circuit layer with a bonding layer;
- forming a plurality of vias through the bonding layer, each via defining an interconnect path between the first circuit and the second circuit;
- and
- depositing a conductor into the vias to interconnect the first circuit with the second circuit along the interconnection paths.
A method of fabricating a circuit, comprising:
- forming a first circuit in a first layer of a first semiconductor material;
- forming a second circuit in a second layer of a second semiconductor material;
- bonding the first layer to the second layer with a bonding layer of an adhesive;
- forming a plurality of vias through the bonding layer, each via defining an interconnection path between the first circuit and the second circuit;
- and
- depositing a conductor into the vias to interconnect the first circuit with the second circuit along the interconnection paths.
A method of fabricating a circuit, comprising:
- forming a first circuit in a first layer of a silicon-on-insulator material;
- forming a second circuit in a second layer of a semiconductor material, the second layer including an array of diodes;
- bonding the first layer to the second layer with a bonding layer of an electrically insulating and thermally conductive adhesive compound, the adhesive compound including a polymeric adhesive and a thermally conductive filler, the bonding layer being less than about 5 microns thick;
- forming a plurality of vias through the bonding layer, each via defining an interconnection path between the first circuit and the second circuit;
- and
- depositing a conductor into the vias to interconnect the first circuit with the second circuit along the interconnection paths.
Dependencies are inferred from the claim text.