Power stabilizer using under-utilized standard cells

A method altering the electrical power supplied to at least one of a plurality of macros in an integrated circuit, comprising the steps of:

• identifying any of said macros which are sensitive to more noise in said electrical power;
• determining if a first one of said plurality of macros, near said sensitive macro, includes underutilized areas;
• upon determining that said first macro is not underutilized, under-utilizing said first macro by a pre-determined percentage;
• and
• placing electrical components in said underutilized area which reduce the noise in said electrical power provided to said sensitive macro.

A system for generating the physical layout of an integrated circuit and for controlling the characteristics of the electrical power supplied to at least one of a plurality of macros in said integrated circuit, comprising:

• means for identifying any of said macros which are sensitive to noise in said electrical power;
• means for determining if a first one of said of plurality of macros, near said sensitive macro, includes underutilized areas;
• and
• means for placing electrical components in said underutilized areas which reduce the noise in said electrical power provided to said sensitive macro.

A system for generating the physical layout of an integrated circuit and for controlling the characteristics of the electrical power supplied to at least one of a plurality of macros in said integrated circuit, comprising:

• means for identifying any of said macros which are sensitive to more noise in said electrical power;
• means for determining if a first one of said plurality of macros, near said sensitive macro, includes underutilized areas
• means for underutilizing said first macro by a predetermined percentage;
• and
• means for placing electrical components in said underutilized area which reduce the noise in said electrical power provided to said sensitive macro.

A system for generating the physical layout of an integrated circuit and for controlling the characteristics of the electrical power supplied to at least one of a plurality of macros in said integrated circuit, comprising:

• means for identifying any of said macros which are sensitive to noise in said electrical power;
• means for determining if a first one of said of plurality of macros, near said sensitive macro, includes underutilized areas;
• and
• means for placing electrical components in said underutilized areas which reduce the noise in said electrical power provided to said sensitive macro;
• means for causing said first macro to be underutilized by a predetermined percentage when it is determined that said first macro is not underutilized;
• means for creating filler cells in said underutilized portions of said first macro;
• means for converting said filler cells into capacitor cells;
• and
• means for fabricating said integrated circuit having said capacitor cells included in said underutilized portions of said first macro.

A method for manufacturing an integrated circuit comprising the acts of:

• forming a plurality of functional blocks comprising electronic devices that implement desired functions, wherein at least one functional block is identified as a noise-sensitive functional block;
• forming an underutilized area near the at least one noise sensitive functional block;
• and
• placing electrical components in said underutilized areas which reduce noise in electrical power provided to said noise in electrical power provided to said noise-sensitive functional block.

An integrated circuit manufactured by a process comprising the steps of:

• identifying any of said macros which are sensitive to more noise in said electrical power;
• determining if a first one of said plurality of macros, near said sensitive macro, includes underutilized areas;
• upon determining that said first macro is not underutilized, under-utilizing said first macro by a pre-determined percentage;
• and
• placing electrical components in said underutilized area which reduce the noise in said electrical power provided to said sensitive macro.

An integrated circuit comprising:

• a plurality of functional blocks comprising electronic devices that implement desired functions, wherein at least one functional block is identified as a noise-sensitive functional block;
• a region allocated to the noise-sensitive functional block which has low utilization;
• and
• electrical components in said underutilized areas which reduce noise in electrical power provided to said noise-sensitive functional block.