System and method for finding and validating the most recent advance load for a given checkload

A method for establishing a status of an advanced load instruction having an associated check instruction during execution of a program, the method comprising:

• (a) simultaneously comparing a register number of the check instruction with a register number of at least one in-flight load instruction and with register number entries accumulated in an associative register number table;
• (b) simultaneously comparing an address of at least one in-flight store instruction with an address of the advanced load instruction and with an address associated with the result of comparing a register number of the check instruction with register number entries accumulated in an associative register number table;
• and
• (c) determining the status based on (a) and (b).

A system for establishing a status of an advanced load instruction having an associated check instruction during execution of a program comprising:

• first means for simultaneously comparing a register number of the check instruction with a register number of at least one in-flight load instruction and with register number entries accumulated in an associative register number table;
• second means for simultaneously comparing an address of at least one in-flight store instruction with an address of the advanced load instruction and with an address associated with the result of comparing a register number of the check instruction with register number entries accumulated in an associative register number table;
• and
• third means for determining the status based on the first means and the second means.

A system for establishing a status of an load instruction having an associated check instruction during execution of a program comprising:

• a first pipeline for storing a plurality of in-flight load instructions;
• a first plurality of comparators, with each comparator associated with a stage of the first pipeline, wherein each compartor compares a register number of the check instruction with a register number of the in-flight load instruction stored in its associated stage of the first pipeline;
• an associative register number table that stores a plurality of entries of information related to a plurality of load instructions, wherein the associative register number table includes a compare function that compares the register number of the check instruction with register number entries of the table;
• a second pipeline for storing a plurality of in-flight store instructions;
• a second plurality of comparators, with each comparator associated with a stage of the second pipeline, wherein each compartor compares an address of the load instruction with an address of the in-flight store instruction stored in its associated stage of the second pipeline;
• logic that selects the status from the results of the first plurality of comparators and the second plurality of comparators.