Current-mode bus line driver having increased output impedance

A current-mode bus driver for generating voltage signals on a bus line having a finite impedance, the current-mode bus driver comprising:

• a primary current source that supplies an output current through the bus line, the output current resulting in a bus line voltage, the primary current source having a finite impedance and supplying decreased output current at low bus line voltages;
• and
• a supplemental current source responsive to the bus line voltage to produce a supplemental output current that supplements the output current of the primary current source at low bus line voltages, wherein the supplemental output current at least partially corrects for the decreased output current of the primary current source at the low bus line voltages;
• wherein the supplemental current source comprises:
• a transistor having a gate that is electrically coupled to the bus line, the transistor having an output that produces a correction current;
• and
• a current mirror having an input electrically coupled to the transistor output and an output electrically coupled to the bus line, wherein the current mirror supplies the supplemental output current in proportion to the correction current.

A current-mode bus driver for generating voltage signals on a bus line having a finite impedance, the current-mode bus driver comprising:

• a primary NMOS transistor current source having a gate electrically coupled to a gate voltage and a drain electrically coupled to the bus line, the primary NMOS transistor current source supplying a primary output current through the bus line, the primary output current resulting in a bus line voltage, the primary NMOS transistor current source having a finite impedance that results in decreased primary output current at low bus line voltages;
• a secondary PMOS transistor current source having a gate electrically coupled to the bus line, the secondary PMOS transistor current source having a source that generates a correction current;
• and
• a MOS current mirror having an input electrically coupled to the source of the secondary PMOS transistor current source and an output that supplies a supplemental output current in conjunction with the primary output current to correct for the decreased primary output current of the primary NMOS transistor source at the low bus line voltages.

A bus signaling system comprising:

• bus means for propagating voltage signals, the bus means having an impedance;
• driving means for driving the voltage signals on the bus means, the driving means including a plurality of current-mode driving means for generating the voltage signals on the bus means by outputting current;
• each current-mode driving means comprising:
• first means for sourcing current that supplies at least one output current through the bus means, the at least one output current resulting in a bus voltage on the bus means, the first means for sourcing current having a finite impedance that results in decreases to the at least one output current when the bus voltage drops;
• and
• second means for sourcing current responsive to the bus voltage to augment the at least one output current of the first means for sourcing current as the bus voltage drops.