Computer interconnection bus link layer

An integrated circuit comprising:

• a plurality of functions;
• a transmit circuit and a receive circuit coupled to respectively transmit data to and receive data from a plurality of pipes carrying transactions over a communication link on a packet multiplexed basis, each of the pipes having a source end and a target end, the integrated circuit including at least a source end for one pipe and a target end for another pipe;
• the source end including a source circuit coupled to at least one of the functions and coupled to send and receive packets to and from the transmit and receive circuits, the packets being identified by a pipe identifier associated with the source end;
• the target end including a target circuit coupled to at least another of the functions and coupled to send and receive packets to and from the transmit and receive circuits, the packets being identified by the pipe identifier associated with the target end;
• a command packet builder circuit responsive to a request from a function to build a command packet;
• a tag reservoir circuit coupled to the command packet builder circuit to supply tags available for use in the command packet, each tag uniquely identifying an out of order transaction on a pipe associated with the source circuit;
• a command queue storing a plurality of commands received from the command packet builder circuit, to be issued over the link;
• and
• a multiplexing circuit coupled to the first transmit circuit to selectably provide write data for the command packet and control information for the command packet;
• a demultiplexing circuit coupled to the receive circuit to receive a response packet transmitted from the target circuit selectably providing control information and read data from the response packet;
• a read data queue coupled to the demultiplexing circuit to receive the read data from the response packet and coupled to the function to provide the read data to the function;
• and
• a response processing circuit coupled to the demultiplexing circuit responsive to control information in the response packet to process the response packet.

A method of performing a transaction in a computer system having a communication link connecting a first and second integrated circuit, transactions being carried over the link on a plurality of pipes, each pipe having a source end in one of the first and second integrated circuits and a target end in the other of the first and second integrated circuits, the first and second integrated circuits having a first and second transmit and receive circuit, respectively, each coupled to a plurality of endpoints, each endpoint being one of a source end and target end, the method comprising:

• generating a transaction request in a first function in the first integrated circuit;
• providing the transaction request to a source end in the first integrated circuit;
• building the transaction request into a transaction request packet that includes a pipe identification, in the source end;
• providing the transaction request to the first transmit circuit;
• transmitting the transaction request packet to the second receive circuit;
• routing the transaction packet to the target end, according to the pipe identification, the target end being one of a plurality of endpoints coupled to the second receive circuit;
• deconstructing the transaction packet to determine a command;
• providing the command to a second function for execution;
• providing an indication from the second function to the target end that the command has been completed;
• building a response packet including the pipe identification;
• providing the response packet to the second transmit circuit;
• transmitting the response packet to the first receive circuit;
• and
• routing the response packet to the source according to the pipe identification.