System and method for testing a circuit implemented on a programmable logic device
AssigneeXilinx, Inc.
InventorChakravarthy K. Allamsetty
Life of this patent
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Abstract
A system and method for testing a circuit implemented on a programmable logic device. A host processor is coupled to the programmable logic device via an interface device, which has a plurality of signal pins for configuring the programmable logic device. Selected pins of the interface device are connected to selected input pins of the programmable logic device. Test vectors from the host processor are applied to the selected input pins of the programmable logic device via the interface device, and the states of one or more signals appearing on one or more output pins of the device are analyzed.
Claims16
A method for testing a circuit implemented on a programmable logic device using a host processor coupled to the programmable logic device via an interface device containing at least one electronic device, the interface device having a plurality of signal pins for configuring the programmable logic device, comprising:
- connecting selected pins of the interface device containing at least one electronic device to selected input pins of the programmable logic device;
- applying test vectors from the host processor to the selected input pins of the programmable logic device via the interface device containing at least one electronic device, each test vector including one or more signal states to be applied to the programmable logic device;
- and
- analyzing states of signals appearing on output pins of the programmable logic device.
A system for testing a circuit implemented on a programmable logic device having input and output pins, comprising:
- a host data processing system configured and arranged to configure the programmable logic device during a configuration process, and to apply input test signals to selected pins of the programmable logic device during a test process;
- an interface device comprising a microcontroller and a RAM, the interface device having pins arranged to be connected to the programmable logic device, wherein selected pins of the interface device are used by the host for predetermined functions during configuration and for test signals during the test process.
A system for testing a circuit implemented on a programmable logic device having input and output pins, comprising:
- a host data processing system configured and arranged to configure the programmable logic device during a configuration process, and to apply input test signals to selected pins of the programmable logic device during a test process;
- an interface device having pins arranged to be connected to the programmable logic device, the interface device including electronic circuits to drive signals to the programmable logic device during configuration of the programmable logic device, and electronic circuits to receive signals from the programmable logic device during testing of the programmable logic device.
Dependencies are inferred from the claim text.