Method and device for providing a multiple phase power on reset
AssigneeTexas Instruments Incorporated
InventorsHugo Cheung, Lu Yuan, Terence Chiu
Life of this patent
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Abstract
A method and apparatus is provided for performing an intelligent power-on-reset, and enabling the verification of a current voltage level with a reconfigurable brown out reset voltage level. In addition, the verification process may be selectively bypassed. Furthermore, the flash memory provides storage for the reconfigurable brown out reset voltage level and selected verification process enable/disable signal. In addition, the verification process occurs in a second phase during which some devices are released from reset mode and then those devices control the verification process.
Claims22
A reconfigurable power-on-reset method for use on integrated circuit devices, the method comprising the steps of:
- storing power-on-reset data to a flash memory device;
- retrieving the power-on-reset data from the flash memory device during a power-on-reset time period;
- executing instructional routines, during the power-on-reset time period, according to the power-on-reset data retrieved;
- turning on a power supply on an integrated circuit device to start the power-on-reset time period;
- holding a plurality of circuits in a reset mode for a first period of time within the power-on-reset time period;
- releasing a subset of the plurality of circuits after the first period of time;
- and
- releasing a remainder of the plurality of circuits after a second period of time following the first period of time and within the power-an-reset time period.
A power-on-reset device for integrated circuit devices, the power or reset device comprising:
- a flash memory configured to hold reconfigurable power-on-reset data;
- a flash controller configured to communicate with the flash memory and to direct portions of a power-on-reset process based on the power-on-reset data received from the flash memory during the power-on-reset process;
- and
- a system reset finite state machine configured to hold a plurality of circuits in a reset mode, to enable the flash controller, and to direct portions of the power-on-reset process based on the power-on-reset data received from the flash memory during the power-on-reset process.
A power-on-reset device for an integrated circuit device, the power or reset device comprising:
- a flash memory configured to hold reconfigurable power-on-reset data;
- a flash controller configured to retrieve the reconfigurable power-on-reset data from the flash memory;
- a brown out detect device configured to receive the reconfigurable power-on-reset data from the flash controller and to compare a current voltage level of an integrated circuit power supply with a brown out voltage level from a subset of the reconfigurable power-on-reset data retrieved from flash memory;
- and
- a system reset finite state machine configured to hold a plurality of circuits in a reset mode, to enable the flash controller, to communicate with the brown out detect device, and to release a remainder of the plurality of circuits when the current voltage level is greater than the brown out voltage level.
An integrated circuit configured with a power-on-reset device, the integrated circuit comprising:
- a flash memory within a microprocessor, wherein the flash memory is configured to reprogrammably store power-on-reset data:
- and
- a flash controller within the microprocessor wherein the microprocessor is configured to release the flash controller during a power-on-reset time period and wherein the flash controller is configured to retrieve power-on-reset data from the flash
- memory during the power-on-reset time period:
- and
- a system reset device configured to hold a plurality of circuits in a reset mode for a first period of time, to release a subset of the plurality of circuits after the first period of time, and to release all circuits after a second period of time.
Dependencies are inferred from the claim text.