Content addressable memory (CAM) with error checking and correction (ECC) capability
AssigneeInternational Business Machines Corporation
InventorTarl S. Gordon
Life of this patent
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Abstract
A content addressable memory (CAM) and method capable of ignoring and correcting bit errors contained therein is disclosed. In an exemplary embodiment, the CAM includes a plurality of individual CAM cells for storing a codeword having a number of bits associated therewith. A match line is coupled to each of the plurality of individual CAM cells, and is used to indicate a match status of a comparand word that is compared to the stored codeword. The match status is reflective of either a match state or a mismatch state. A sensing apparatus is used for latching the match line to the match state whenever the comparand word mismatches the stored codeword by a number of N or fewer bits, wherein N is defined a maximum number of correctable bits for a given ECC algorithm used.
Claims44
A content addressable memory (CAM), comprising:
- a plurality of individual CAM cells for storing a codeword, said codeword having a number of bits associated therewith;
- a match line coupled to each of said plurality of individual CAM cells, said match line used to indicate a match status of a comparand word that is compared to said stored codeword, wherein said match status is reflective of either a match state or a mismatch state;
- and
- a sensing apparatus for latching said match line to said match state whenever said comparand word mismatches said stored codeword by a number of N or fewer bits.
A content addressable memory (CAM), comprising:
- a plurality of individual CAM cells for storing a codeword, said codeword having a number of bits associated therewith;
- a match line coupled to each of said plurality of individual CAM cells, said match line used to indicate a match status of a comparand word that is compared to said stored codeword, wherein said match status is reflective of either a match state or a mismatch state;
- and
- a sensing apparatus for latching said match line to said match state whenever said comparand word mismatches said stored codeword by a number of N or fewer bits, and said sensing apparatus further latching said match line to said mismatch state whenever said comparand word mismatches said stored codeword by more than N bits, said sensing apparatus further comprising:
- a reference match line, said reference match line being discharged at a selected rate from a precharged state during a compare operation;
- wherein, during said compare operation, said sensing apparatus determines said match status by comparing said selected rate of discharge of said reference match line to a rate of discharge of said match line;
- and
- said CAM cells further being adapted to correct any mismatching bits stored therein if said match line is latched to said match state.
A method for detecting a soft error within a content addressable memory (CAM), the method comprising:
- configuring a plurality of individual CAM cells for storing a codeword having a number of bits associated therewith;
- coupling a match line to each of said Plurality of individual CAM cells, said match line used to indicate a match status of a comparand word that is compared to said stored codeword, wherein said match status is reflective of wither a match state or a mismatch state;
- and
- configuring a sensing apparatus for latching said match line to said match state whenever said comparand word mismatches said stored codeword by a number of N or fewer bits.
A method for detecting and correcting a soft error within a content addressable memory (CAM), the method comprising:
- configuring a plurality of individual CAM cells for storing a codeword having a number of bits associated therewith;
- coupling a match line to each of said plurality of individual CAM cells, said match line used to indicate a match status of a comparand word that is compared to said stored codeword, wherein said match status is reflective of either a match state or a mismatch state;
- configuring a sensing apparatus for latching said match line to said match state whenever said comparand word mismatches said stored codeword by a number of N or fewer bits;
- and
- adapting said CAM cells are adapted to correct any mismatching bits stored therein if said match line is latched to said match state.
A method for detecting and correcting soft error within a content addressable memory (CAM), the method comprising:
- comparing a rate of discharge of a precharged match line included within the CAM with a rate of discharge of a precharged reference match line included within the CAM, said match line being coupled to a plurality of CAM cells within the CAM;
- determining, based on said rate of discharge of said reference match line and said rate of discharge of said match line, whether there exists either a match state or a mismatch state;
- said match state being defined by a mismatch of a N or fewer bits between a stored codeword and a comparand word applied to the CAM;
- said mismatch state being defined by i mismatch of N+1 or more bits between said stored codeword and said comparand word;
- and
- inverting any mismatching bits within said stored codeword if a match state exists.
Dependencies are inferred from the claim text.