US 6,618,238 B2 · Parallel plate buried capacitor

Abstract

A novel capacitor foil and printed circuit board intermediate made using that foil are disclosed. The capacitor foil is a three-layer construction having a conductive layer, a partially-cured high dielectric constant layer, and a partially-cured bonding layer. The high dielectric constant and bonding layers are formed with epoxy or other polymer, however, the high dielectric constant layer is loaded with capacitive ceramic particles or pre-fired ceramic forming particles. The bonding layer may or may not be filled with ceramic particles or prefired ceramic-forming particles. The resulting capacitor foil may be applied to a laminate having copper patterns thereon to define a PCB intermediate containing at least one buried capacitor device. Multiple layers of capacitance material also can be used to increase the overall capacitance of the board.

Claims10

Dependent claims

An intermediate capacitor foil which comprises a multi-layered body having:

a) a conductive copper foil having an exposed surface;
b) a bonding layer comprising a polymeric layer and having a thickness in the range of from about 0.0005 to about 0.001 inches, and having an unbonded surface;
and
c) a partially-cured, filled, epoxy resin joined to and between (a) the conductive copper foil at a surface opposite the exposed surface and (b) the bonding layer at a surface opposite the unbonded surface, the resin being loaded with a filler comprising ceramic particles having a high dielectric constant, wherein the filled resin forms a dielectric layer having a thickness in the range of about 0.0005 to about 0.003 inches,
wherein the bonding layer is:
unfilled;
less-highly filled than the partially-cured, filled epoxy resin;
or
relatively uncured.

6 more elements

Dependencies are inferred from the claim text.

Parallel plate buried capacitor

Life of this patent

Parallel plate buried capacitor

Life of this patent

Abstract

Claims10