Capacitive flash analog to digital converter

An electronic circuit for a capacitive flash analog to digital converter for converting a ratio of first and second analog signals into a digital code representation using an array of parallel capacitive comparator branches, each branch computing one bit of the digital code simultaneously according to its array index, wherein the first analog signal is applied as a voltage difference between first signal nodes comprising a first positive signal node and a first negative signal node, the second analog signal is applied as a voltage difference between second signal nodes comprising a second positive signal node and a second negative signal node, each branch comprising:

• (i) a comparator having a positive input node, a negative input node, a positive output node and a negative output node,
• (ii) first and second positive capacitors having a positive common plate connected to the positive input node of the comparator,
• (iii) first and second negative capacitors having a negative common plate connected to the negative input node of the comparator, and
• (vi) first and second feedback switches;
• and wherein the first and second positive capacitors also respectively have first and second positive opposite plates which are respectively switchably connected to the first and second signal nodes, and the first and second negative capacitors also respectively have first and second negative opposite plates which are respectively switchably connected to the first and second signal nodes.