Analog to digital converter using asynchronously swept thermometer codes

An A/D converter, comprising:

• an operational amplifier having an inverting input, a non-inverting input and an output;
• a first resistor couple between a terminal to which an analog input voltage to be digitized is applied and the inverting input;
• a second resistor coupled between the inverting input and output of the operational amplifier;
• a comparator coupled to the output of the amplifier;
• a chain of buffers, wherein a logic 1 is loaded into a first buffer of the buffer chain;
• reset means for periodically resetting the chain of buffers to logic O outputs;
• a conversion table coupled to the outputs of the buffers for translating the logic 1s in the buffers into a binary digital code;
• and
• a D/A converter coupled to the conversion table to receive and translate the binary digital code into a ramp voltage, the ramp voltage being input into the inverting input of the operational amplifier device for generating a digitized representation of the input voltage.

An A/D converter comprising:

• a means for generating an increasing thermometer code, the code generating means including a chain of buffers;
• a means for translating said thermometer code into a ramp voltage;
• and
• a means for comparing the ramp voltage to an analog input voltage and providing a signal when the ramp voltage equals a specified analog input voltage, said signal causing the thermometer code to be frozen, wherein the frozen thermometer code represents the digitized amplitude of the analog voltage.

An A/D converter, comprising:

• indication means for indicating which one of a plurality of consecutive voltage ranges are exceeded by an analog input voltage;
• a chain of buffers;
• loading means for loading a logic 1 into a buffer at one end of the buffer chain;
• reset means for periodically resetting the buffers so that logic 0s are output from the buffers and for enabling the logic 1 loaded in the buffer to propagate through the other buffers in the buffer chain;
• ramp voltage producing means responsive both to the indication means and the presence of logic 1s in the output of the buffer for producing a ramp voltage;
• comparison means for comparing the amplitude of the ramp voltage to a selected analog input voltage;
• control means for freezing the propagation of logic 1s through the chain of buffers when the amplitude of the ramp voltage equals the selected analog input voltage;
• and
• code generating means for producing a digital code corresponding to the amplitude of the ramp voltage when the buffers are frozen.

An A/D converter, comprising:

• signal means for indicating the highest one of a plurality of consecutive voltage ranges exceeded by an analog input voltage;
• code generating means including a chain of buffers and the signal means for producing a thermometer code having an initial value corresponding to a maximum one of a plurality of voltage ranges exceeded by the analog input voltage, the value increasing from the initial value;
• voltage producing means for producing a ramp voltage corresponding to the thermometer code;
• comparison means for comparing the ramp voltage with the analog input voltage and producing a signal when they are equal;
• and
• control means responsive to said signal for freezing the thermometer code, the frozen thermometer code being a digitized representation of the amplitude of the analog input voltage at such time.

A method for converting an analog voltage into a digital representation thereof, comprising the following steps:

• generating a thermometer code by utilizing a chain of buffers;
• generating a ramp voltage corresponding to the thermometer code, wherein the ramp voltage increases as the thermometer code increases;
• comparing the amplitude of the ramp voltage to the amplitude of an analog input voltage;
• producing a first signal when the analog voltage and the ramp voltage have the same amplitude;
• freezing the amplitude of the ramp voltage in response to the first signal;
• and
• converting the thermometer code at the time of the freezing into a binary digital representation of the analog input voltage.

An apparatus for generating a ramp voltage for comparison with an analog voltage to be digitized, comprising:

• at least one comparator having an input to which an analog input voltage to be digitized is applied, and an output;
• a chain of buffers;
• loading means for loading a logic 1 into a first buffer in the buffer chain;
• activation means for activating the loading means wherein the logic 1 propagates through the chain of buffers;
• a conversion table coupled to both the output of the comparator and the chain of buffers for producing a binary digital code representing the amplitude of the sum of a range indicated by the comparator and the chain of buffers, the binary digital code being the digital representation of the analog input voltage;
• and
• a D/A converter coupled to the output of the conversion table for producing a ramp voltage.

A method for generating a ramp voltage for comparison with an analog voltage to be digitized, comprising the steps of:

• dividing a maximum amplitude of an analog input voltage into a plurality of voltage ranges;
• determining the voltage ranges the analog voltage exceeds at a given time;
• initiating the propagation of a logical 1 through a chain of buffers at the given time;
• and
• deriving a ramp voltage corresponding to a highest voltage range exceeded by the analog voltage and outputs of the buffers through which the logic 1 has propagated.

A method for deriving a code representing the amplitude of an analog voltages comprising the steps of:

• deriving a ramp voltage;
• applying an analog voltage and the ramp voltage to an operational amplifier such that its output changes sign when the ramp voltage exceeds the analog voltage;
• producing a logic 0 when the amplitude of the ramp voltage is less than the amplitude of the analog voltage, and a logic 1 when the amplitude of the ramp voltage is greater than the amplitude of the analog voltage;
• freezing the passage of the logic 1 through a chain of buffers in response to the logic −1;
• and
• translating a voltage range exceeded by the analog voltage and the number of buffers through which the logic 1 has propagated when the freezing occurs into a digital code representing the amplitude of the analog voltage.