Method and/or apparatus for implementing constraint codes with low error propagation

An apparatus for generating constraint codes in a stream of data having a plurality of multi-bit source words comprising:

• means for checking a sequence portion of said source words for one or more constraint violations;
• and
• means for modifying a predetermined portion of each of said source words to generate a plurality of corresponding multi-bit code words configured to prevent said constraint violations of said sequence portions across an adjacent two of said multi-bit code words if said constraint violations are not detected, wherein said constraint violations comprise interleave constraint violations having a predetermined bit-width of consecutive bits at alternating states.

An apparatus comprising:

• a first circuit configured to check a sequence portion of a plurality of multi-bit source words for one or more constraint violations, wherein said plurality of multi-bit words comprise a stream of data;
• and
• a second circuit configured to modify a predetermined portion of each of said source words to generate a plurality of corresponding multi-bit code words, wherein (A) said code words are configured to prevent said constraint violations of said sequence portions across an adjacent two of said multi-bit code words if said constraint violations are not detected, and (B) if a first type of constraint violation is detected said apparatus is further configured to (i) remove said sequence portion of a Particular word, (ii) modify said predetermined portion of said source word to a sequence replacement mark (SRM), (iii) insert a pointer configured to indicate a relative bit position where said sequence pattern was removed, (iv) insert a type indicator configured to indicate a type of violation that was removed, and (v) stuff a number of bits at a particular state at a number of predetermined locations to generate said coded word.

A method for generating constraint codes in a stream of data having a plurality of multi-bit source words, comprising the steps of:

• (A) checking a sequence portion of said source words for one or more constraint violations;
• and
• (B) if no constraint violations are detected, modifying a predetermined portion of each of said source words to generate a plurality of corresponding multi-bit code words configured to prevent said constraint violations of said sequence portions across an adjacent two of said multi-bit code words, wherein step (B) comprises mapping said predetermined portion from a first bit pattern to a corresponding second bit pattern, wherein said second bit pattern comprises a larger width bit pattern then said first bit pattern.