VCO circuit with wide output frequency range and PLL circuit with the VCO circuit

A voltage-controlled oscillating circuit receiving supply of a power source voltage to operate comprising:

• a voltage generating circuit setting a voltage level of a bias voltage according to a control voltage being different from said power source voltage inputted from the outside,
• said voltage generating circuit including an operational amplifier, which is an amplifier of a single stage configuration, and receiving supply of said power source voltage to operate,
• said operational amplifier having
• first and second input terminals, wherein one of said first and second input terminals is electrically coupled with said control voltage, and
• an output terminal outputting said bias voltage, and
• said voltage generating circuit further including a) a feedback portion coupled between said output terminal and another one of said first and second input terminals and b) an inverting amplifier circuit using said operational amplifier receiving supply of said power source voltage to operate;
• and
• a ring oscillator circuit generating a clock having a frequency corresponding to said bias voltage, and having an odd-number of inverters, interconnected in a closed ring, and each inverter receiving supply of said bias voltage to operate, wherein each of said inverters includes a p-channel MOS transistor receiving said bias voltage at its source electrode.

A phase-locked loop circuit generating an output clock for operating an internal circuit in synchronism with a reference clock, comprising:

• a phase comparator circuit comparing said reference clock with a feedback clock from said internal clock;
• a control circuit setting a voltage level of a control voltage based on a phase comparison result of said phase comparator circuit;
• and
• a voltage-controlled oscillating circuit receiving supply of a power source voltage being different from said control voltage to operate and supply said output clock having a frequency according to said control voltage to said internal circuit,
• said voltage-controlled oscillating circuit including a voltage generating circuit setting a voltage level of a bias voltage according to said control voltage,
• said voltage generating circuit having an operational amplifier, which is an amplifier of a single stage configuration, and receiving supply of said power source voltage to operate,
• said operational amplifier having
• first and second input terminals, wherein one of said first and second input terminals is electrically coupled with said control voltage, and
• an output terminal outputting the bias voltage, and
• said voltage generating circuit further having
• a feedback portion coupled between said output terminal and another one of said first and second input terminals, and
• said voltage-controlled oscillating circuit further including a ring oscillator circuit generating a clock, as said output clock, having a frequency corresponding to that of said bias voltage, said ring oscillator circuit having an odd-number of inverters, interconnected in a closed ring, and each inverter receiving supply of said bias voltage to operate.

A voltage-controlled oscillating circuit receiving supply of a power source voltage to operate comprising:

• a voltage generating circuit setting a voltage level of a bias voltage according to a control voltage being different from said power source voltage inputted from the outside,
• said voltage generating circuit including an operational amplifier, which is an amplifier of a single stage configuration, and receiving supply of said power source voltage to operate,
• said operational amplifier having
• first and second input terminals, wherein one of said first and second input terminals is electrically coupled with said control voltage, and
• an output terminal outputting said bias voltage, and
• said voltage generating circuit further including a feedback portion coupled between said output terminal and another one of said first and second input terminals;
• and
• a ring oscillator circuit generating a clock having a frequency corresponding to said bias voltage, and having an odd-number of inverters, interconnected in a closed ring, and each inverter receiving supply of said bias voltage to operate, wherein the one of said first and second input terminals is electrically coupled with said control voltage via a resistor.

A voltage-controlled oscillating circuit receiving supply of a power source voltage to operate comprising:

• a voltage generating circuit setting a voltage level of a bias voltage according to a control voltage being different from said power source voltage inputted from the outside
• said voltage generating circuit including an operational amplifier, which is an amplifier of a single stage configuration, and receiving supply of said power source voltage to operate,
• said operational amplifier having
• first and second input terminals, wherein one of said first and second input terminals is electrically coupled with said control voltage, and
• an output terminal outputting said bias voltage, and
• said voltage generating circuit further including a feedback portion coupled between said output terminal and another one of said first and second input terminals;
• and
• a ring oscillator circuit generating a clock having a frequency corresponding to said bias voltage, and having an odd-number of inverters, interconnected in a closed ring, and each inverter receiving supply of said bias voltage to operate, wherein an other one of said first and second input terminals is electrically coupled with a reference voltage.

A voltage-controlled oscillating circuit receiving supply of a power source voltage to operate comprising:

• voltage generating circuit setting a voltage level of a bias voltage according to a control voltage being different from said power source voltage inputted from the outside,
• said voltage generating circuit including an operational amplifier, which is an amplifier of a single stage configuration, and receiving supply of said power source voltage to operate,
• said operational amplifier having
• first and second input terminals, wherein one of said first and second input terminals is electrically coupled with said control voltage, and
• an output terminal outputting said bias voltage, and
• said voltage generating circuit further including a feedback portion coupled between said output terminal and another one of said first and second input terminals;
• and
• a ring oscillator circuit generating a clock having a frequency corresponding to said bias voltage, and having an odd-number of inverters, interconnected in a closed ring, and each inverter receiving supply of said bias voltage to operate, wherein each of said inverters includes a p-channel MOS transistor receiving said bias voltage at its source electrode.