System and method for threshold bias offset voltage cancellation in a comparator
AssigneeApplied MicroCircuits Corporation
InventorsHongming An, Brian Lee Abernethy, Bruce Harrison Coy
Life of this patent
Estimating the term…
Loading patent…
AssigneeApplied MicroCircuits Corporation
InventorsHongming An, Brian Lee Abernethy, Bruce Harrison Coy
Estimating the term…
A system and method are provided for reducing the threshold bias offset voltage in a comparator, by canceling and bypassing the bias offset current errors. The comparator system comprises amplification stages with bias cancellation circuitry and a threshold setting circuit. The bias offset current cancellation circuit is used to cancel the base current of differential amplifier input emitter follower. The bias offset current cancellation circuit also cancels the loading effect of amplifier input emitter-follower driving stage. The threshold offset voltage is further reduced by the threshold setting circuit. The threshold-setting circuit includes two integrators and a unit gain operation amplifier. The integrators have the input accept a single-ended input signal, an output connected to the negative input of the comparator, and an output connected to the unit gain operational amplifier, whose output is connected to the negative input of the comparator.
A system for canceling bias offset current errors, to minimize threshold offset voltages in a comparator, the system comprising:
In a comparator, a system for the cancellation of threshold offset voltages, the system comprising:
A method for canceling bias current errors in a comparator, the method comprising:
Dependencies are inferred from the claim text.