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US 6,617,903 B2Granted
Inverter circuit having an improved slew rate
AssigneeOki Electric Industry Co., Ltd.
InventorYukio Kawamura
Life of this patent
Estimating the term…
Abstract
An inverter circuit includes a first transistor connected between an input terminal and a gate of a second transistor, a second transistor connected between power supply voltage and an output terminal, a third transistor connected between an input terminal and a gate of a fourth transistor and a fourth transistor connected between a ground and the output terminal.
Claims18
An inverter circuit comprising:
- an input terminal;
- an output terminal;
- a first transistor;
- a second transistor connected between a power supply voltage and the output terminal,
- the first transistor being connected between the input terminal and a gate of the second transistor;
- a third transistor;
- a fourth transistor connected between a ground and the output terminal,
- the third transistor being connected between the input terminal and a gate of the fourth transistor;
- a fifth transistor connected between the ground and the gate of the second transistor;
- and
- a sixth transistor connected between the power supply voltage and the gate of the fourth transistor.
8 more elements
An inverter circuit comprising:
- an input terminal;
- an output terminal;
- a first transistor;
- a second transistor connected between a power supply voltage and the output terminal,
- the first transistor being connected between a first node and a gate of the second transistor;
- a third transistor;
- a fourth transistor connected between a ground and the output terminal, the third transistor being connected between the first node and a gate of the fourth transistor;
- a fifth transistor connected between the power supply voltage and the gate of the second transistor, a gate of the fifth transistor being connected to the input terminal;
- a sixth transistor connected between the ground and the gate of the fourth transistor, a gate of the sixth transistor being connected to the input terminal;
- a seventh transistor connected between the power supply voltage and the first node;
- and
- an eighth transistor connected between the ground and the first node.
9 more elements
An inverter circuit comprising:
- an input terminal;
- an output terminal;
- a first transistor, a gate of the first transistor being coupled to a first node;
- a second transistor connected between a power supply voltage and the output terminal,
- the first transistor being connected between a ground and a gate of the second transistor;
- a third transistor, a gate of the third transistor being coupled to the first node;
- a fourth transistor connected between the ground and the output terminal,
- the third transistor being connected between the power supply voltage and a gate of the fourth transistor;
- a fifth transistor connected between the power supply voltage and the gate of the second transistor, a gate of the fifth transistor being connected to the input terminal;
- a sixth transistor connected between the ground and the gate of the fourth transistor, a gate of the sixth transistor being connected to the input terminal;
- a seventh transistor connected between the power supply voltage and the first node;
- and
- an eighth/transistor connected between the ground and the first node.
10 more elements
Dependencies are inferred from the claim text.