Method and apparatus for a low power, multi-mode GTL I/O buffer utilizing midrail I/O buffer pad clamping
AssigneeIntel Corporation
InventorXiaolin Yuan
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AssigneeIntel Corporation
InventorXiaolin Yuan
Estimating the term…
A method and apparatus for a multi-level GTL interface signaling buffer utilizing midrail buffer pad clamping are described. The system includes a buffer having a P-kicker pull-up device which pulls up a pad voltage level to an intended overshoot level. A pull-down device pulls down the pad voltage level to a termination voltage level VTT. Consequently, the P-kicker pull-up device and the pull-down device counteract one another to generate a low-voltage midrail overshoot level that is less than or equal to a maximum gate voltage level. The midrail overshoot level that is less than or equal to the maximum gate voltage level in order to prevent gate oxide breakdown to CPU LVGTL input buffer circuits caused by overshoot levels in excess of a maximum gauge voltage level.
A method comprising:
An apparatus, comprising:
A system comprising:
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