US 6,617,680 B2 · Chip carrier, semiconductor package and fabricating method thereof

Abstract

A chip carrier, a semiconductor package and a fabricating method thereof are proposed, in which on one side of the chip carrier finally removed from an engaged surface of a mold in a de-molding process there is formed at least one grounding means corresponding in position to an eject pin of the mold, so as to allow a gear amount of electrical static generated on a surface of the semiconductor package during molding and de-molding to be discharged to the outside, instead of being retained on a semiconductor chip, conductive elements and conductive traces of the semiconductor package. This therefore can prevent electrical leakage and damage to the semiconductor chip from occurrence, and improve the quality and production efficiency for the semiconductor package.

Claims14

Dependent claims

A chip carrier, comprising:

a first side;
a second side opposing the first side;
and
at least one grounding means formed on the second side corresponding in position to an eject pin of a mold, wherein the mold is coupled to the chip carrier for forming an encapsulant on the chip carrier, and decoupled from the chip carrier such that the grounding means is electrically connected to the eject pin when the mold is removed from the chip carrier for discharging electrical static through the mold.

1 more element

A semiconductor package, comprising:

a chip carrier having a first side and a second side opposing the first side;
at least one semiconductor chip mounted on the first side of the chip carrier;
a plurality of conductive elements for electrically connecting the semiconductor chip to the chip carrier;
an encapsulant formed of a molding compound for encapsulating the semiconductor chip and the conductive elements on the first side of the chip carrier;
and
a plurality of solder balls implanted on die second side of the chip carrier;
wherein on one of the sides of the chip carrier there is formed at least one grounding means corresponding in position to an eject pin of a mold which is coupled to the chip carrier for forming the encapsulant, and decoupled from the chip carrier such that the grounding means is electrically connected to the eject pin when the mold is removed from the chip carrier for discharging electrical static through the mold.

4 more elements

Dependencies are inferred from the claim text.

Facts

Application

09/935,312Filed 22 Aug 2001

Published

US 2003/0038351 A127 Feb 2003

Granted

9 Sep 2003

Term ends

Not estimatedThe source records don’t support an estimate.

Classification8 codes

H10W 74/016
Manufacture or treatment: using moulds
H10W 90/701
Package configurations: characterised by the relative positions of pads or connectors relative to package parts
H10W 72/552
Materials of bond wires: comprising metals or metalloids, e.g. silver
H10W 72/884
On different surfaces: die-attach connectors and bond wires

Chip carrier, semiconductor package and fabricating method thereof

Life of this patent

Chip carrier, semiconductor package and fabricating method thereof

Life of this patent

Abstract

Claims14