Semiconductor device having a fuse and a fabrication process thereof

#The present invention generally relates to semiconductor devices, and more particularly to a semiconductor device having fuse patterns and a fuse window cooperating therewith such that the fuse patterns are selectively blown by irradiating a laser beam through the fuse window.

#With the advancement in the art of device miniaturization, the effect of defective device elements in a semiconductor integrated circuit on the overall production yield of the integrated circuit is increasing. This problem is particularly serious in large-capacity LSI memory devices of very large total number of bits such as 64 Mbit DRAMs (dynamic random access memories). Because of this problem, such large capacity LSI memory devices generally use a redundant construction in which a plurality of redundant memory cell rows or a plurality of redundant memory cell columns are provided in a memory cell array. Further, such a redundant construction generally includes a fuse typically formed of polysilicon. Thus, when a memory cell row or memory cell column containing a defective bit is to be replaced with a redundant memory cell row or a redundant memory cell column, or when to conduct other desired functional selection, it has been practiced to selectively blow a suitable fuse pattern by a laser beam or by an electrical current.

#It should be noted that such a fuse pattern is generally surrounded by various semiconductor circuit elements and interconnection layers. In recent highly integrated semiconductor devices, the interconnection layer extends to the region in the vicinity of the fuse pattern, and because of this, there tends to arise the problem of poor planarization in the protective film covering the interconnection patterns in the interconnection layer when the width or pitch of the interconnection layer is reduced. When the planarization of the protective film is thus deteriorated, the step coverage of the interconnection patterns by the protective film is deteriorated, leading to void formation. Such a formation of void in the protective film causes the problem of poor resistance of the integrated circuit against moisture. Thus, in order to improve the resistance against moisture, various efforts are being made to improve the planarization of the protective film by using various protective films.

#FIGS. 1A-1C are diagrams showing the fabrication process of a conventional semiconductor device having a fuse;

#FIGS. 2A-2D are diagrams showing the fabrication process of another conventional semiconductor device having a fuse;

#FIGS. 3A-3C are diagrams showing the fabrication process of a further conventional semiconductor device having a fuse;

#[First Embodiment]

#FIGS. 6A-6C show the fabrication process of a semiconductor device according to a first embodiment of the present invention.

#Referring to FIG. 6A, there is formed a fuse pattern 3 on an insulation film 2 covering the surface of a Si substrate 1, wherein the insulation film 2 is covered further with an insulation film 4 of SiO2 or BPSG such that the insulation film 4 covers the fuse pattern 3. Further, an etching stopper layer 5 of polysilicon is formed on the insulation film 4 so as to cover the fuse pattern 3, and another insulation film 6 is formed on the insulation film 4 so as to cover the etching stopper layer 5. Further, a conductor pattern 7A and a contact pad 7B typically of an Al-alloy are formed on the insulation film 6, and a passivation film 8 typically of SiN is formed on the insulation film 6 so as to cover the interconnection pattern 7A and the contact pad 7B.