Semiconductor memory device
AssigneeKabushiki Kaisha Toshiba
InventorTakashi Ohsawa
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AssigneeKabushiki Kaisha Toshiba
InventorTakashi Ohsawa
Estimating the term…
A semiconductor memory device has full depletion type MISFETs to constitute memory cells (MC) on a semiconductor substrate (11) via an insulating film (12). Each MISFET has a semiconductor layer (13), a source region (16), a drain region (17), the semiconductor layer between the source region and the drain region serving as a channel body in a floating state, a main gate (15) on a first side of the channel body, and an auxiliary gate (18) on a second side of the channel body. With a state, in which the channel body is fully depleted by an electric field from the main gate and a portion of the second side of the channel body is capable of accumulating majority carriers by an electric field from the auxiliary gate, as a reference state, the MISFET has a first data state in which the majority carriers are accumulated and a second data state in which the majority carriers are emitted.
A semiconductor memory device
A semiconductor memory device having full depletion type MISFETs to constitute memory cells on a semiconductor substrate via an insulating film, each of the MISFETs comprising:
Dependencies are inferred from the claim text.