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US 6,617,647 B2Granted
Insulated gate semiconductor device and method of manufacturing the same
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorShunpei Yamazaki
Life of this patent
Estimating the term…
Abstract
Dot-pattern-like impurity regions 104 are artificially and locally formed on a channel forming region 103. The impurity regions 104 restrain the expansion of a drain side depletion layer toward the channel forming region 103 to prevent the short channel effect. The impurity regions 104 allow a channel width W to be substantially fined, and the resultant narrow channel effect releases the lowering of a threshold value voltage which is caused by the short channel effect.
Claims55
A method of manufacturing a semiconductor device, said method comprising:
- forming a source region, a drain region and a channel forming region having a channel width and a channel length in a crystalline semiconductor film over a substrate;
- forming a plurality of impurity regions by adding impurity elements locally in said channel forming region, each of said impurity regions having a width smaller than the channel width;
- and
- forming a gate insulating film and a gate electrode over said channel forming region;
- wherein said impurity elements added to said impurity regions in said channel region shift an energy band width (Eg),
- wherein said impurity region are arranged in a matrix form in the channel forming regions in a channel width direction and in a channel length direction, and
- wherein each of said impurity regions has one conductivity opposite to that of the source and drain regions.
4 more elements
A method according to claim 7, wherein the elements of group XIII are boron, and the elements of group XV are one of phosphorus and arsenic.
A method of manufacturing a semiconductor device, said method comprising:
- forming a source region, a drain region and a channel forming region having a channel width and a channel length in a crystalline semiconductor film over a substrate;
- forming a gate insulating film and a gate electrode over said channel forming region;
- and
- locally adding impurity elements that shift an energy band width (Eg) to said channel forming region, in order to form a plurality of impurity regions each of which pins a depletion layer that expands from said drain region toward said channel forming region and said source region, each of said impurity regions having a width smaller than the channel width,
- wherein said impurity region are arranged in a matrix form in the channel forming regions in a channel width direction and in a channel length direction, and
- wherein each of said impurity regions has one conductivity opposite to that of the source and drain regions.
3 more elements
A method of manufacturing a semiconductor device, said method comprising:
- forming a source region, a drain region and a channel forming region having a channel width and a channel length in a crystalline semiconductor film over a substrate;
- forming a gate insulating film and a gate electrode over said channel forming region;
- and
- locally adding impurity elements that shift an energy band width (Eg) to said channel forming region, in order to form a plurality of impurity regions, each of said impurity regions having a width smaller than the channel width,
- wherein said impurity regions in said channel forming region are arranged in a matrix form in the channel forming regions in a channel width direction and in a channel length direction, and
- in order to control to a predetermined threshold value voltage and control a path through which the carriers move, and
- wherein each of said impurity regions has one conductivity opposite to that of the source and drain regions.
4 more elements
A method of manufacturing a semiconductor device, said method comprising:
- forming a source region, a drain region and a channel forming region having a channel width and a channel length in a crystalline semiconductor film over a substrate;
- and
- locally forming a plurality of impurity regions by addition of impurity elements that shift an energy band width (Eg) in said channel forming region;
- and
- forming a gate insulating film and a gate electrode formed over said channel forming region;
- wherein said impurity regions have an insulating property and arranged in a matrix form in a channel width direction and in a channel length direction;
- and
- wherein regions other than said impurity region in said channel forming region are not added with said impurity elements.
5 more elements
A method of manufacturing a semiconductor device, said method comprising:
- forming a source region, a drain region and a channel forming region having a channel width and a channel length in a crystalline semiconductor film over a substrate;
- forming a gate insulating film and a gate electrode over said channel forming region;
- and
- locally adding impurity elements that shift an energy band width (Eg) to said channel forming region, in order to form a plurality of impurity regions which pin a depletion layer that expands from said drain region toward said channel forming region and said source region,
- wherein said impurity regions have an insulating property and are arranged in a matrix form in the channel forming regions in a channel width direction and in a channel length direction.
2 more elements
A method of manufacturing a semiconductor device, said method comprising:
- forming a source region, a drain region and a channel forming region having a channel width and a channel length in a crystalline semiconductor film over a substrate;
- forming a gate insulating film and a gate electrode over said channel forming region;
- and
- locally adding impurity elements that shift an energy band width (Eg) to said channel forming region, in order to form a plurality of impurity regions having an insulating property,
- wherein said impurity region are arranged in a matrix form in the channel forming regions in a channel width direction and in a channel length direction in order to control a predetermined threshold value voltage and control a path through which the carriers move.
2 more elements
Dependencies are inferred from the claim text.