Semiconductor device and a method of manufacturing the same
AssigneeHitachi, Ltd.
InventorsYasuhiro Taniguchi, Kazuyoshi Shiba, Nozomu Matsuzaki, Hidenori Takada, Hitoshi Kume, Shoji Shukuri
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AssigneeHitachi, Ltd.
InventorsYasuhiro Taniguchi, Kazuyoshi Shiba, Nozomu Matsuzaki, Hidenori Takada, Hitoshi Kume, Shoji Shukuri
Estimating the term…
A parallel connection-type nonvolatile memory semiconductor device comprises a plurality of memory cells disposed on a semiconductor substrate in matrix form, each including a gate insulating film, a floating gate electrode, an interlayer film and a control gate electrode successively formed so as to cover a channel region on a main surface of the semiconductor substrate, of a first conductivity type; a second conductivity type source and drain regions formed on the semiconductor substrate on both sides opposite to each other, of the floating gate electrode so as to interpose a channel region located under the floating gate electrode therebetween; a first semiconductor region which is adjacent to the drain region and formed by introducing a second conductivity type impurity in the direction of the channel region placed under the floating gate electrode from an end on the drain side, of the floating gate electrode, and which is substantially lower than the drain region in impurity concentration; and a punch-through stopper layer which is adjacent to the first semiconductor region and formed by introducing a first conductivity type impurity in the direction of the channel region placed under the floating gate electrode from an end on the drain side, of the floating gate electrode, and which is substantially higher than the channel region in impurity concentration, and wherein the source regions and drain regions of the plurality of nonvolatile memory cells are parallel-connected to one another in respective columns, word lines some of which constitute the control gate electrodes of the plurality of nonvolatile memory cells, extend in respective rows, a voltage is applied to at least one word line, which is set so as to serve as a selected word line, and when carriers are stored in a floating gate electrode of each selected memory cell, a negative voltage is applied to other non-selected word lines other than the selected word line.
A semiconductor device comprising:
A semiconductor device comprising:
A semiconductor device comprising:
Dependencies are inferred from the claim text.