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AssigneeMicron Technology, Inc.
InventorsCem Basceri, Garo J. Derderian, Mark R. Visokay, John M. Drynan, Gurtej S. Sandhu
Estimating the term…
In part, disclosed are semiconductor processing methods, methods of depositing a tungsten comprising layer over a substrate, methods of depositing a tungsten nitride comprising layer over a substrate, methods of depositing a tungsten silicide comprising layer over a substrate, methods of forming a transistor gate line over a substrate, methods of forming a patterned substantially crystalline Ta2O5 comprising material, and methods of forming a capacitor dielectric region comprising substantially crystalline Ta2O5 comprising material. In one implementation, a semiconductor processing method includes forming a substantially amorphous Ta2O5 comprising layer over a semiconductive substrate. The layer is exposed to WF6 under conditions effective to etch substantially amorphous Ta2O5 from the substrate. In one implementation, the layer is exposed to WF6 under conditions effective to both etch substantially amorphous Ta2O5 from the substrate and deposit a tungsten comprising layer over the substrate during the exposing.
A method of depositing a tungsten comprising layer over a substrate comprising:
A method of depositing an elemental tungsten comprising layer over a substrate comprising:
A method of depositing a tungsten nitride comprising layer over a substrate comprising:
A method of depositing a tungsten silicide comprising layer over a substrate comprising:
A method of forming a transistor gate line over a substrate comprising:
Dependencies are inferred from the claim text.