Manufacturing method for semiconductor device
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorHiroshi Kawashima
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AssigneeMitsubishi Denki Kabushiki Kaisha
InventorHiroshi Kawashima
Estimating the term…
A region around the gate of a PMOSFET that does not, at a minimum, affect the transistor characteristics is covered with a resist and a diagonal ion implantation for drain engineering is carried out in a P well region beneath gate electrode. Ions of a first conductive type are implanted in a portion wherein a well contact layer is formed so as to form well contact layer. The above described diagonal ion implantation and the ion implantation for forming the above described well contact layer are carried out so that when the depth is plotted along the longitudinal axis and the impurity concentration is plotted along the lateral axis in the impurity profile of well contact larger, impurity profile or the first conductive type that forms well contact layer covers profile of the impurities that form the impurity diffusion layer.
A manufacturing method for a semiconductor device, comprising:
Dependencies are inferred from the claim text.