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US 6,617,209 B1Granted
Method for making a semiconductor device having a high-k gate dielectric
AssigneeIntel Corporation
InventorsRobert Chau, Reza Arghavani, Mark Doczy
Life of this patent
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Abstract
A method for making a semiconductor device is described. That method comprises forming on a substrate a dielectric layer that has a dielectric constant that is greater than the dielectric constant of silicon dioxide. The dielectric layer is modified so that it will be compatible with a gate electrode to be formed on the dielectric layer, and then a gate electrode is formed on the dielectric layer.
Claims19
A method for making a semiconductor device comprising:
- forming on a substrate a dielectric layer that has a dielectric constant that is greater than the dielectric constant of silicon dioxide;
- modifying the dielectric layer so that it will be compatible with a gate electrode to be formed on the dielectric layer;
- and then
- forming a gate electrode on the dielectric layer, wherein the dielectric layer is modified by:
- forming a sacrificial layer on the dielectric layer;
- transporting impurities from the dielectric layer to the sacrificial layer, then removing the sacrificial layer.
3 more elements
A method for making a semiconductor device comprising:
- forming a high-k gate dielectric layer on a substrate, the high-k gate dielectric layer including impurities;
- forming a sacrificial layer on the high-k gate dielectric layer;
- transporting the impurities from the high-k gate dielectric layer to the sacrificial layer;
- then
- removing the sacrificial layer;
- and
- forming a layer that comprises polysilicon on the high-k gate dielectric layer.
4 more elements
A method for making a semiconductor device comprising:
- forming a high-k gate dielectric layer on a substrate, the high-k gate dielectric layer being less than about 100 angstroms thick and comprising a material selected from the group consisting of hafnium oxide, zirconium oxide, titanium oxide, and aluminum oxide;
- forming a titanium nitride layer that is between about 10 angstroms and about 50 angstroms thick on the high-k gate dielectric layer;
- annealing the titanium nitride layer at a temperature of between about 500° C. and about 1,000° C. for between about 5 minutes and about 20 minutes;
- then
- removing the titanium nitride layer;
- forming a layer that comprises polysilicon on the high-k gate dielectric layer;
- and
- etching the polysilicon containing layer and the high-k gate dielectric layer.
5 more elements
Dependencies are inferred from the claim text.