Test structure for detecting bridging of DRAM capacitors

A method of electrical testing of a test structure during the manufacturing of an integrated circuit, comprising the steps of:

• (a) providing a test structure having
• (i) a first region on a silicon substrate designated for a functional section of said integrated circuit;
• (ii) a second region on a silicon substrate designated for said structure;
• (iii) first semiconductor devices formed in said first region, said first semiconductor devices comprising first words lines in addition to first activating bit lines in addition to first non-activating bit lines;
• (iv) second semiconductor devices formed in said second region, said second semiconductor devices comprising second word lines in addition to second bit lines, said second word lines patterned over said semiconductor devices in a layout identical to that of first word lines in said first region, said second bit lines provided in a repetitive sequence of four bit lines each sequence comprising an activating bit line, a dummy bit line, a non-activating bit line and a dummy bit line, said second word lines patterned in said second region over said semiconductor devices in a layout identical to that of first word lines in said first region, said second bit lines being exposed bit lines in a pattern that is perpendicular with a pattern of said first bit lines;
• (v) a first contact pad formed at the ends of a plurality of said first and second word lines;
• (vi) a second contact pad formed at the ends of a plurality of said activating first bit lines of said first semiconductor devices and selected second bit lines said second semiconductor devices;
• (vii) a first probe pad connected to said non-activating bit lines provided to first semiconductor devices formed in said first region;
• and
• (viii) a second probe pad connected to said non-activating bit lines provided to second semiconductor devices formed in said second region;
• (b) mounting said silicon substrate in a probe testing station;
• (c) supplying voltages to said contact pads;
• (d) applying test probes to said probe pads;
• and
• (e) measuring current flow through said test probes.