Process to reduce surface roughness of low K damascene
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChao Cheng Chen, Chen Nan Yeh
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AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChao Cheng Chen, Chen Nan Yeh
Estimating the term…
Low K dielectrics, such as porous silica, present a problem during damascene processing in that the trench floor tends to be rough, thus requiring a thicker than desired barrier layer. This problem has been overcome by fully covering the trench floor with a layer of a flowable material following which an etchant is provided that etches both the trench and flowable materials at approximately the same rate. Using this etchant, the trench floor is then uniformly etched until only a small amount of flowable material remains. After removal of any and all remaining flowable material, it is found that the roughness at the trench floor has been reduced by a factor of about 3-5. This allows a barrier layer of normal thickness to be used during the standard copper damascene process without danger of copper leakage. The process is particularly well suited for use with porous silica dielectrics having a dielectric constant less than about 2.5.
A process for smoothing a first surface having a first roughness value, comprising:
A process for etching a trench in a layer of porous material, comprising:
Dependencies are inferred from the claim text.