Differential amplifier offset adjustment
AssigneeIntel Corporation
InventorsBryan K. Casper, James E. Jaussi
Life of this patent
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Abstract
A differential amplifier includes a source coupled differential pair of transistors. A feedback loop detects the presence of an input referred offset in the differential amplifier and modifies a body bias voltage on at least one of the transistors in the differential pair. A comparator detects a differential output voltage when the differential input voltage is set to zero. In some embodiments, a charge pump in the feedback loop injects charge on the body of the transistor to modify the bias voltage. In other embodiments, a digital-to-analog converter receives a digital control word and produces a bias voltage on the body of the transistor.
Claims23
A circuit comprising:
- first and second transistors coupled as a differential pair, each of the first and second transistors having a gate, a source, a drain, and a body;
- and
- a capacitor coupled between the body and the source of the first transistor;
- wherein the body of the second transistor is coupled to the source of the second transistor.
A differential amplifier circuit comprising:
- a current source;
- a differential pair of transistors coupled to the current source, the differential pair of transistors including a first transistor and a second transistor;
- a comparator to compare a differential output voltage of the differential pair of transistors;
- and
- a body bias circuit coupled between the comparator and a body of the first transistor, wherein the body bias circuit comprises a charge pump to modify charge on the body of the first transistor responsive to the comparator.
A differential amplifier circuit comprising:
- a current source;
- a differential pair of transistors coupled to the current source, the differential pair of transistors including a first transistor and a second transistor;
- a comparator to compare a differential output voltage of the differential pair of transistors;
- and
- a body bias circuit coupled between the comparator and a body of the first transistor, wherein the body bias circuit comprises a digital-to-analog converter to apply a bias voltage to the body of the first transistor responsive to the comparator.
A differential amplifier circuit comprising:
- a current source;
- a differential pair of transistors coupled to the current source, the differential pair of transistors including a first transistor and a second transistor;
- a comparator to compare a differential output voltage of the differential pair of transistors;
- a body bias circuit coupled between the comparator and a body of the first transistor;
- and two select transistors coupled in series between gate nodes of the differential pair of transistors to drive the gate nodes to a common voltage.
A differential amplifier circuit comprising:
- a current source;
- a differential pair of transistors coupled to the current source, the differential pair of transistors including a first transistor and a second transistor;
- a comparator to compare a differential output voltage of the differential pair of transistors;
- and
- a body bias circuit coupled between the comparator and a body of the first transistor, wherein:
- the first transistor includes a source node coupled to the current source and a drain node coupled to a first input node of the comparator;
- and
- the second transistor includes a body node and a source node coupled to the current source, and a drain node coupled to a second input node of the comparator.
An integrated circuit comprising:
- an amplifier having an input stage that includes a differential pair of transistors, the differential pair of transistors including a first transistor having a first body and a second transistor having a second body;
- an offset detector coupled to the differential pair of transistors to detect an offset current;
- and
- a body bias circuit responsive to the offset detector to bias the first body;
- wherein the body bias circuit includes:
- a charge pump coupled to inject charge on the first body;
- and
- a control circuit responsive to the offset detector to influence operation of the charge pump.
An integrated circuit comprising:
- an amplifier having an input stage that includes a differential pair of transistors, the differential pair of transistors including a first transistor having a first body and a second transistor having a second body;
- an offset detector coupled to the differential pair of transistors to detect an offset current;
- and
- a body bias circuit responsive to the offset detector to bias the first body;
- wherein the integrated circuit is a circuit selected from the group comprising a processor, a memory, a memory controller, an application specific integrated circuit, and a communications device.
A method comprising:
- setting gate nodes of a differential pair of transistors to a common potential;
- detecting which of the differential pair of transistors has a greater current passing therethrough;
- and
- modifying a body bias of at least one transistor of the differential pair;
- wherein detecting which of the differential pair of transistors has a greater current comprises comparing voltages present on drain nodes of each of the differential pair of transistors.
A method comprising:
- setting gate nodes of a differential pair of transistors to a common potential;
- detecting which of the differential pair of transistors has a greater current passing therethrough;
- and
- modifying a body bias of at least one transistor of the differential pair;
- wherein modifying a body bias comprises causing a charge pump to inject charge on the body of the at least one transistor.
A method comprising:
- setting gate nodes of a differential pair of transistors to a common potential;
- detecting which of the differential pair of transistors has a greater current passing therethrough;
- and
- modifying a body bias of at least one transistor of the differential pair;
- wherein modifying a body bias comprises modifying a digital word input to a digital-to-analog converter.
An article comprising a machine-readable medium with instructions encoded thereon, the instructions when executed operable to cause a computerized system to:
- detect an amplifier offset by setting gate nodes of a differential pair of transistors to a common potential and detecting which of the differential pair of transistors has a greater current passing therethrough;
- and
- modify a body bias of at least one of the transistors in the differential pair of transistors;
- wherein modifying a body bias comprises changing a digital word input to a digital-to-analog converter.
An article comprising a machine-readable medium with instructions encoded thereon, the instructions when executed operable to cause a computerized system to:
- detect an amplifier offset by setting gate nodes of a differential pair of transistors to a common potential and detecting which of the differential pair of transistors has a greater current passing therethrough;
- and
- modify a body bias of at least one of the transistors in the differential pair of transistors;
- wherein modifying a body bias comprises influencing a charge pump to inject charge on a body of the one transistor.
Dependencies are inferred from the claim text.