Path filtering for latch-based systems

A method, comprising:

• representing a latch-based circuit as a netlist data structure;
• statically analyzing the netlist data structure;
• producing timing information for signal paths within the latch-based circuit;
• and
• filtering the signal paths using path termination information, wherein the path termination information specifies a termination point of a signal path that ends at a latch, and wherein the path termination information distinguishes a first signal path that terminates at the latch from a second signal path that flows through the latch during a transparent mode.

A computer system, comprising:

• a static timing analyzer stored in memory, the static timing analyzer producing timing information for signal paths in a digital circuit;
• a filter mechanism stored in memory, the filter mechanism filtering the signal paths using path termination information, the path termination information distinguishing a first signal path that ends at a transparent latch from another signal path that flows through the transparent latch, the filtering mechanism reducing the number of signal paths analyzed;
• and
• a microprocessor communicating with the memory, the microprocessor capable of generating timing behavior of the digital circuit.