Memory control apparatus and method for storing data in a selected cache memory
AssigneeHitachi, Ltd.
InventorsMisako Takahashi, Yoshihiro Asaka, Shigeru Kishiro, Akira Yamamoto
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AssigneeHitachi, Ltd.
InventorsMisako Takahashi, Yoshihiro Asaka, Shigeru Kishiro, Akira Yamamoto
Estimating the term…
A memory control apparatus is interposed between a central processing unit and a memory device to store data includes a plurality of cache memories to temporarily store data which is transferred between the central processing unit and the memory device and a cache memory control unit having a selector for selecting a cache memory to store data which is transferred from the memory device. The memory control apparatus assigns cache memories to store clean data and dirty data, which is updated data corresponding to the clean data, in accordance with a data identifier, whether a slot number is odd or even, or a usable amount of memory in the cache memories. The memory control apparatus selects a cache memory to store the data so as to almost equalized usage in the plurality of cache memories, thereby controlling the allocation of the cache memories.
A memory control apparatus, in a RAID structure which is interposed between a central processing unit and a memory device for storing data, having a plurality of cache memories for temporarily storing data of said memory device, and for transferring data between said central processing unit and said memory device, said memory control apparatus comprising:
A memory control apparatus, which is interposed between a central processing unit and a memory device for storing data, having a plurality of cache memories for temporarily storing data of said memory device, for transferring data between said central processing unit and said memory device, said memory control apparatus comprising:
A memory control apparatus, which is interposed between a central processing unit and a memory device for storing data, having a plurality of cache memories for temporarily storing data of said memory device, and for transferring data between said central processing unit and said memory device, wherein each of said plurality of cache memories includes at least one cache memory unit, said memory control apparatus comprising:
In a memory control apparatus, which is interposed between a central processing unit and a memory device for storing data, having a plurality of cache memories for temporarily storing data of said memory device, for transferring data between said central processing unit and said memory device, a cache control method, responsive to a data write request from said central processing unit, comprising the steps of:
In a memory control apparatus, which is interposed between a central processing unit and a memory device for storing data, having a plurality of cache memories for temporarily storing data of said memory device, for transferring data between said central processing unit and said memory device, a cache control method, responsive to a data write request from said central processing unit, comprising the steps of:
Dependencies are inferred from the claim text.