Fast program to program verify method
AssigneeHalo LSI, Inc.
InventorsSeiki Ogura, Tomoko Ogura, Nori Ogura
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Abstract
In the present invention a new method for program and program verify is described. The threshold voltage of the memory cell is shifted up and then measured with minimal charging and discharging of the bit lines and control gate lines. Bit line to control gate line capacitance is also used to reduce the number of voltage references needed. Program current is reduced by use of a load device coupled to the source diffusion. The result is increased program bandwidth with lower high voltage charge pump current consumption.
Claims9
A method to program verify a dual storage site MONOS memory cell using a reverse read operation, comprising:
- a) maintaining a first voltage coupled to a first control gate located above an unselected storage site of a MONOS memory cell to be same as for a program operation,
- b) lowering a second voltage coupled to a second control gate above a selected storage site of said memory cell to a value less than that used for said program operation,
- c) disconnecting and floating a drain diffusion and a source diffusion of said memory cell, then
- d) equalizing said drain diffusion voltage and said source diffusion voltage of said memory cell,
- e) biasing a word gate voltage of said memory cell to a third voltage higher than used for said program operation, then
- f) lowering said drain diffusion voltage to a value below said drain and source equalize voltage, then
- g) comparing said source diffusion voltage to a reference voltage.
Dependencies are inferred from the claim text.