Read-only nonvolatile memory

Abstract

A read-only nonvolatile memory in which the leakage current of unselected memory cell transistors is suppressed. Adjacent memory cell transistors are commonly connected to drain lines, and adjacent memory cell transistors on the other side are commonly connected to source lines. Gates within a same row are commonly connected to a word line. An offset structure is formed on the drain side of each memory cell transistor, and a non-offset structure is formed on the source side. Accordingly, in each memory cell transistor a depletion layer is generated between the drain region and channel region when a drain line is activated, but the depletion layer directly under a drain region does not reach the channel region when the drain line is in a state of high impedance. Therefore, there is no leakage current from the drain to the source in unselected memory cell transistors. Since there is no leakage current flowing from unselected memory cell transistors to source lines, the read margin is enhanced.

Dependencies are inferred from the claim text.