Content addressable memory having redundant circuit
AssigneeKawasaki Microelectronics, Inc.
InventorsNaoki Kanazawa, Ryuichi Hata
Life of this patent
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Abstract
In a content addressable memory (CAM), a spare CAM word serving as a redundant circuit is mounted in addition to a plurality of CAM words, and a storage section for holding information indicating whether there is a defective CAM word in the plurality of CAM words, and if there is one or more defective CAM word, address information of the defective CAM word. Control is applied according to the address information of the defective CAM word such that the defective CAM word is replaced with the spare CAM word. The search output of the defective CAM word is replaced with that of the spare CAM word. The spare CAM word serving as a redundant circuit is mounted without increasing a circuit scale and an output delay time, and a produce yield is improved.
Claims14
A content addressable memory (CAM) comprising:
- a plurality of CAM words;
- one or more spare CAM word serving as a redundant circuit;
- a defective-CAM-word address storage section for holding information indicating whether there is one or more defective CAM word in the plurality of CAM words, and if there is one or more defective CAM word, address information of the defective CAM word;
- a shift control circuit for controlling such that the addresses of CAM words located at lower-order addresses than the defective CAM word are shifted in a lower-order direction or in an higher-order direction by the use of the spare CAM word, according to the address information of the defective CAM word, held in the defective-CAM-word address storage section;
- a first shift circuit for shifting the addresses of CAM words located at lower-order addresses than i-th (i:
- integer equal to 1 or more) defective CAM word in the lower-order direction by “i” according to the control of the shift control circuit at a read/write access of data;
- and
- a second shift circuit for shifting the addresses of the CAM words located at lower-order addresses than the i-th defective CAM word in the higher-order direction by “i” according to the control of the shift control circuit at a search operation.
A content addressable memory (CAM) comprising:
- a plurality of CAM words;
- one or more spare CAM word serving as a redundant circuit;
- a defective-CAM-word address storage section for holding information indicating whether there is one or more defective CAM word in the plurality of CAM words, and if there is one or more defective CAM word, address information of the defective CAM word;
- a shift control circuit for controlling such that the addresses of CAM words located at higher-order addresses than the defective CAM word are shifted in a higher-order direction or in an lower-order direction by the use of the spare CAM word, according to the address information of the defective CAM word, held in the defective-CAM-word address storage section;
- a first shift circuit for shifting the addresses of CAM words located at higher-order addresses than i-th (i:
- integer equal to 1 or more) defective CAM word in the higher-order direction by “i” according to the control of the shift control circuit at a read/write access of data;
- and
- a second shift circuit for shifting the addresses of the CAM words located at higher-order addresses than the i-th defective CAM word in the lower-order direction by “i” according to the control of the shift control circuit at a search operation.
Dependencies are inferred from the claim text.