Method for design verification using modular templates of test benches
OwnerZhe Liinventor
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Abstract
A method for functional verification of a digital circuit design in a hardware description language, using a multi-level test bench template to drive the design and to check the design's behavior. Wild cards in the design and in the test bench template are used to provide constraints. A hybrid analysis process is applied as well as symbolic analysis, exhaustive simulation and pseudo-random simulation. A similar method is also used for functional coverage analysis in functional verification.
Claims19
A method for verification of a design, using a test bench template comprising one or more levels, comprising the steps of:
- obtaining said test bench template and said design;
- identifying a set of one or more wild cards in said design and in said test bench template;
- processing said design and said test bench template based on said set of one or more wild cards;
- and
- adjusting said test bench template by adding, removing or replacing one or more levels before repeating all steps after the step of obtaining, whereby said design is driven differently in each iteration and/or the behavior of said design is observed differently in each iteration.
A method for verification of a design, using a test bench template, comprising the steps of:
- obtaining said test bench template and said design;
- identifying a set of one or more wild cards in said design and in said test bench template;
- turning one or more members of said set of one or more wild cards into members of a set of one or more symbolic Boolean variables;
- adding one or more Boolean equations of said set of one or more symbolic Boolean variables, whereby constraints become more restricted, by joining the added Boolean equations with the Boolean equations from both the test bench template and the design, as to make the next step easier to perform;
- and
- analyzing said one or more Boolean equations with said design and said test bench template, based on said set of one or more symbolic Boolean variables, whereby the result shows whether the design is functional correct with respect to the test bench template and the added Boolean equations.
Dependencies are inferred from the claim text.