Quad pumped bus architecture and protocol

A bus connected to a plurality of bus agents, the bus comprising:

• a multidrop bidirectional control bus to provide a plurality of control signals including a common bus clock, an address strobe signal and a data strobe signal;
• a multidrop bidirectional data bus to allow a driving agent to drive information elements onto the data bus at a frequency that is a multiple of a frequency of the bus clock;
• and
• a multidrop bidirectional address bus to allow a driving agent to drive information elements onto the address bus at a frequency that is a multiple of a frequency of the bus clock;
• wherein the driving agent activates the data strobe signal to identify points for sampling the information elements driven onto the data bus;
• and
• wherein the driving agent activates the address strobe signal to identify points for sampling the information elements driven onto the address bus.

An apparatus for transferring information, comprising:

• a plurality of agents, at least one of the agents operating as a driving agent;
• a multidrop bidirectional bus connected to the agents, the bus including a control bus, an address bus and a data bus, the control bus including a common bus clock line for providing a common bus clock to all agents, an address strobe signal line and a plurality of data strobe signal lines;
• wherein a driving agent can drive a request onto the address bus using a multi pumped signaling mode in which information elements of the request are transmitted at a rate that is a multiple of a frequency of the bus clock, and in which the driving agent can temporarily activate an address strobe signal on the address strobe signal line to identify sampling points for the information elements driven onto the address bus;
• and
• wherein a driving agent can transfer data using a multi pumped signaling mode in which data elements are driven by a driving agent onto the data bus at a rate that is a multiple of the frequency of the bus clock, and in which the driving agent also can temporarily activate a plurality of data strobe signals in a staggered or offset arrangement onto the plurality of data strobe signal lines to identify sampling points for sampling the data elements.

A bus agent comprising:

• a plurality of data interfaces;
• a plurality of data strobe interfaces;
• a plurality of address interfaces;
• an address strobe interface;
• a common clock interface for a bus clock signal having a bus clock frequency;
• data strobe generation logic to generate a first data strobe signal and a second data strobe signal on a first data strobe interface and a second data strobe interface, said first data strobe signal and said second data strobe signal having a data strobe frequency of substantially twice said bus clock frequency;
• address strobe generation logic to generate a first address strobe on said address strobe interface having an address strobe frequency which is substantially the same as said bus clock frequency;
• data transmit logic to transmit data elements synchronized to a first edge of said first data strobe signal on said plurality of data interfaces and to transmit data elements synchronized to a first edge of said second data strobe signal also on said plurality of data interfaces;
• and
• address transmit logic to transmit address elements synchronized to a first edge of said first address strobe on said plurality of address interfaces and to transmit address elements synchronized to a second edge of said first address strobe also on said plurality of address interfaces.

A bus agent comprising:

• a plurality of data interfaces comprising data interfaces D[63:0];
• a plurality of address interfaces;
• a plurality of request interfaces comprising request interfaces REQ[3:0];
• a common clock interface for a bus clock signal having a bus clock frequency;
• a plurality of control interfaces to transmit a plurality of signals that are to operate synchronously to said bus clock signal;
• data strobe generation logic to generate four pairs of data strobe signals, each of said four pairs of data strobe signals having a first data strobe signal and a second data strobe signal, said first data strobe signal and said second data strobe signal of each of said four pairs of data strobe signals having a data strobe frequency of substantially twice said bus clock frequency;
• address strobe generation logic to generate a first address strobe having an address strobe frequency which is substantially the same as said bus clock frequency;
• data transmit logic to transmit, for each of said four pairs of data strobe signals and on different subsets of said plurality of data interfaces;
• first data elements synchronized to a falling edge of said first data strobe signal on a subset of said plurality of data interfaces;
• second data elements synchronized to a falling edge of said second data strobe signal also on the subset said plurality of data interfaces;
• and
• address transmit logic to first transmit address elements synchronized to a falling edge of said first address strobe on said plurality of address interfaces and to second transmit address elements synchronized to a rising edge of said first address strobe also on said plurality of address interfaces, said address transmit logic is also to first transmit request elements synchronized to said falling edge of said first address strobe on said plurality of request interfaces and to second request elements synchronized to said rising edge of said first address strobe also on said plurality of request interfaces.

A bus agent comprising:

• a plurality of data interfaces;
• a plurality of address interfaces;
• a common clock interface for a bus clock signal having a bus clock frequency;
• data strobe receipt logic to receive a first data strobe signal and a second data strobe signal, said first data strobe and said second data strobe having a data strobe frequency of substantially twice said bus clock frequency;
• address strobe receive logic to receive a first address strobe having an address strobe frequency which is substantially the same as said bus clock frequency;
• data receive logic to receive data elements synchronized to a first edge of said first data strobe signal on said plurality of data interfaces and to receive data elements synchronized to a first edge of said second data strobe signal also on said plurality of data interfaces;
• and
• address receive logic to receive address elements synchronized to a first edge of said first address strobe on said plurality of address interfaces and to receive address elements synchronized to a second edge of said first address strobe also on said plurality of address interfaces.

A bus agent comprising:

• a bus clock interface for a bus clock that operates at a bus clock frequency;
• double pumped address bus interface logic to communicate address bus information elements at substantially twice the bus clock frequency in a source synchronous manner;
• double pumped request bus interface logic to communicate request information elements at substantially twice the bus clock frequency in a source synchronous manner;
• and
• quad pumped data bus interface logic to communicate data bus information elements at substantially four times the bus clock frequency in a source synchronous manner.

A system comprising:

• an address bus;
• a request bus;
• a data bus;
• at least one bus clock signal line to transmit one or more bus clock signals operating at a bus clock frequency;
• a first agent coupled to said address bus, said request bus, and said data bus, said first agent having bus interface logic to provide quad pumped data on the data bus, and double pumped address and request information respectively on said address bus and said request bus;
• and
• a first agent coupled to said address bus, said request bus, and said data bus, said first agent having bus interface logic to receive quad pumped data on the data bus, and double pumped address and request information respectively on said address bus and said request bus.

A system comprising:

• a bus comprising:
• a plurality of data lines;
• a plurality of data strobe lines;
• a plurality of address lines;
• an address strobe line;
• a bus clock signal line;
• a first agent comprising:
• a plurality of first agent data interfaces coupled to said plurality of data lines;
• a plurality of first agent data strobe interfaces coupled to said plurality of data strobe lines, said plurality of first agent data strobe interfaces comprising a first agent first data strobe interface and a first agent second data strobe interface;
• a plurality of first agent address interfaces coupled to said plurality of address lines;
• a first agent address strobe interface coupled to said address strobe line;
• a first agent common clock interface coupled to receive a bus clock signal having a bus clock frequency;
• first agent data strobe generation logic to generate a first agent first data strobe signal on the first agent first data strobe interface and a first agent second data strobe signal on the first agent second data strobe interface, said first agent first data strobe signal and said first agent second data strobe signal having a data strobe frequency of substantially twice said bus clock frequency;
• first agent address strobe generation logic to generate a first agent address strobe on said first agent address strobe interface having an address strobe frequency which is substantially the same as said bus clock frequency;
• first agent data transmit logic to transmit first data elements synchronized to a first falling edge of said first agent first data strobe signal on said plurality of first agent data interfaces and to transmit second data elements synchronized to a first falling edge of said first agent second data strobe signal also on said plurality of first agent data interfaces and to transmit third data elements synchronized to a second falling edge of said first agent first data strobe signal on said plurality of first agent data interfaces and to transmit fourth data elements synchronized to a second falling edge of said first agent second data strobe signal also on said plurality of first agent data interfaces;
• first agent address transmit logic to first transmit address elements synchronized to a falling edge of said first agent address strobe on said plurality of address interfaces and to second transmit address elements synchronized to a rising edge of said first agent address strobe also on said plurality of address interfaces;
• and a second agent comprising:
• a plurality of second agent data interfaces coupled to said plurality of data lines;
• a plurality of second agent data strobe interfaces coupled to said plurality of data strobe lines, said plurality of second agent data strobe interfaces comprising a second agent first data strobe interface and a second agent second data strobe interface;
• a plurality of second agent address interfaces coupled to said plurality of address lines;
• a second agent address strobe interface coupled to said address strobe line;
• a second agent common clock interface coupled to receive the bus clock signal having the bus clock frequency;
• second agent data strobe receipt logic to receive said first agent first data strobe signal and said first agent second data strobe signal on said plurality of second agent data strobe interfaces;
• second agent address strobe receive logic to receive said first agent address strobe on said second agent address strobe interface;
• second agent data receive logic to receive said first data elements synchronized to said first falling edge of said first agent first data strobe signal on said plurality of second agent data interfaces and to receive said second data elements synchronized to said first falling edge of said first agent second data strobe signal also on said plurality of second agent data interfaces and to receive said third data elements synchronized to said second falling edge of said first agent first data strobe signal on said plurality of second agent data interfaces and to receive said fourth data elements synchronized to said second falling edge of said first agent second data strobe signal also on said plurality of second agent data interfaces;
• and
• second agent address receive logic to receive address elements synchronized to said first edge of said first agent address strobe on said plurality of second agent address interfaces and to receive address elements synchronized to said second edge of said first agent address strobe also on said plurality of address interfaces.

A method comprising:

• providing a plurality of complementary strobe signal pairs in a data phase;
• providing four data elements per bus clock cycle transmitted in a source synchronous manner in conjunction with said plurality of complementary strobe signal pairs;
• providing a plurality of address strobes;
• and
• providing two request elements and two address elements per bus clock cycle transmitted in a source synchronous manner in conjunction with said plurality of address strobes.

A bus agent comprising:

• a control interface circuit to drive a control signal at a clock frequency;
• an address bus interface circuit to drive address elements at substantially twice the clock frequency, said address bus interface circuit to drive a centered address strobe transition for each address element;
• and
• a data bus interface circuit to drive data elements at substantially four times the clock frequency, said data bus interface circuit to drive a centered data strobe transition for each data element.

A bus agent comprising:

• address generation logic to drive two address elements in a duration of one clock cycle of a bus clock signal, said address generation logic to generate a first address strobe to have a first address strobe transition at a first address element center point of a first address element driving window in which the first address elements are driven, said address generation logic to generate said first address strobe to have a second transition at a second address element center point of a second address element driving window in which the second address elements are driven;
• and
• data generation logic to drive four data elements in a second duration of one clock cycle of the bus clock signal, said data generation logic to generate a first data strobe to have a first transition of the first data strobe at a first data element center point of a first data element driving window in which a first data element is driven, and wherein said data generation logic is to generate a second data strobe to have a first transition of the second data strobe at a second data element center point of a second data element driving window in which a second data element is driven, and wherein said data generation logic is to generate said first data strobe to have a second transition of the first data strobe at a third data element center point of a third data element driving window in which a third data element is driven, and wherein said data generation logic is to generate said second data strobe to have a second transition of the second data strobe at a fourth data element center point of a fourth data element driving window in which a fourth data element is driven.

A bus agent comprising:

• a plurality of data interfaces;
• a plurality of address interfaces;
• an address strobe interface;
• a common clock interface for a bus clock signal having a bus clock frequency;
• address strobe generation logic to generate an address strobe on said address strobe interface having an address strobe frequency which is a multiple of said bus clock frequency;
• and
• address transmit logic to transmit address elements onto said plurality of address interfaces, said address elements synchronized to predetermined edges of said address strobe.