Nonvolatile semiconductor memory device applying positive source and substrate voltages during a programming period
AssigneeNEC Electronics Corporation
InventorsToshikatsu Jinbo, Kazuo Watanabe
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Abstract
According to the present invention, a voltage of 10.5 V, a voltage of 6.5 V and a voltage of 0.5 V are respectively applied to the control gate, the drain and the source of a memory cell that is a programming target. And a voltage of 0 V (a ground voltage) is applied to the control gate of a memory cell that is not a programming target and that does not belong to the row in which of the programming target memory cell is located. As a result, it is ensured that the memory cell that is not the programming target is non-conductive, and that the drain-substrate electrical field of the memory cell that is the programming target is reduced.
Claims17
A nonvolatile semiconductor memory device comprising:
- a first memory cell;
- and
- a voltage supply circuit which produces a source voltage to be supplied to a source of said memory cell, a drain voltage to be supplied to a drain of said memory cell and a substrate voltage during a programming period, each of said source, drain and substrate voltages being a positive voltage and said drain voltage being higher than said source voltage.
A nonvolatile semiconductor memory device, which includes at the least, first and second memory cells, comprising:
- a row decoder which applies a first voltage to a control gate of said first memory cell and a ground voltage to a control gate of said second memory cell in accordance with an address signal;
- a programming circuit which applies a program voltage to the drains of said first and said second memory cells;
- and
- a substrate source bias circuit which applies a second voltage to sources of said first and said second memory cells, and applies a third voltage to the substrates of said first and said second memory cells,
- wherein each of said second and said third voltages has a voltage level between said first voltage and said ground voltage.
A nonvolatile semiconductor memory device comprising:
- a plurality of row lines;
- a row decoder for activating a row line in accordance with a row address signal;
- a plurality of column lines;
- a reading/programming circuit for applying one of a read voltage and a program voltage to a column line in accordance with a column address signal;
- a plurality of nonvolatile memory cells, the control gates of which are respectively connected to said row lines, and the drains of which are respectively connected to said column lines;
- and
- a substrate source bias circuit which applies a source voltage and a substrate voltage to said plurality of nonvolatile memory cells,
- wherein, said substrate source bias circuit sets said source voltage and said substrate voltage to a ground voltage during a reading period, and said substrate source bias circuit sets said source voltage and said substrate voltage to a positive voltage during a programming period.
A method for programming a nonvolatile semiconductor memory device comprising:
- applying a first voltage that is higher, by a predetermined value, than a ground voltage to a source of a memory cell transistor to be programmed;
- applying a second voltage to a control gate of said memory cell transistor;
- applying a third voltage higher than said first voltage to a drain of said memory cell transistor;
- and
- applying a fourth voltage that is higher, by said predetermined value, than a ground voltage to a substrate of said memory cell transistor.
Dependencies are inferred from the claim text.