US 6,608,771 B2 · Low-power circuit structures and methods for content addressable memories and random access memories

Abstract

A method is provided for associating an address with data. The method includes precharging a matchline connected to a plurality of tag match functions to a first potential, wherein each tag match function comprises one or more match logic devices, discharging two tag lines for a first tag bit to ground, and reading a plurality of tag bits and corresponding data bits onto a plurality of tag lines and a plurality of data lines respectively. The method further includes determining a match between the tag bits and data bits, and pulling the matchline to a second potential upon determining a match for each of the tag bits.

Claims21

Dependent claims

A method of matching two data sources through a wired exclusive-nor (XNOR) function comprising the steps of:

discharging a first tag line and a second tag line associated with a first tag bit;
precharging a matchline, connected to a plurality of tag match functions, to a first potential, wherein each tag match function comprises one or more match logic devices;
reading a plurality of tag bits, including the first tag bit, and corresponding data bits, onto a plurality of corresponding tag lines and data lines respectively;
and
determining a match between each tag bit and data bit, wherein the matchline is pulled to a second potential upon each match logic device indicating a match, and wherein the matchline is held at the first potential upon any match logic device indicating a mismatch.

2 more elements

A wake up device which detects source operands, comprising:

a content addressable memory based on a wired XNOR match function, including at least two tag lines for receiving data from a results tag latch and a tag drive;
a first tag bit and data bit connected to a first match function, the first match function pulling to a first potential upon evaluating a match;
at least a second tag bit and data bit connected to a second match function, the second match function pulling to a second potential upon evaluating a mismatch;
and
a precharged matchline connecting the tag match functions, pulled to the second potential, the precharged value adapted to indicate a mismatch of the match function.

2 more elements

Dependencies are inferred from the claim text.

Low-power circuit structures and methods for content addressable memories and random access memories

Life of this patent

Low-power circuit structures and methods for content addressable memories and random access memories

Life of this patent

Abstract

Claims21